diff options
Diffstat (limited to 'Documentation/mainboard/hp')
| -rw-r--r-- | Documentation/mainboard/hp/2170p.md | 2 | ||||
| -rw-r--r-- | Documentation/mainboard/hp/2560p.md | 2 | ||||
| -rw-r--r-- | Documentation/mainboard/hp/8760w.md | 4 | ||||
| -rw-r--r-- | Documentation/mainboard/hp/compaq_8200_sff.md | 4 | ||||
| -rw-r--r-- | Documentation/mainboard/hp/compaq_8300_usdt.md | 4 | ||||
| -rw-r--r-- | Documentation/mainboard/hp/elitebook_820_g2.md | 2 | ||||
| -rw-r--r-- | Documentation/mainboard/hp/folio_9480m.md | 2 | ||||
| -rw-r--r-- | Documentation/mainboard/hp/z220_sff.md | 4 |
8 files changed, 12 insertions, 12 deletions
diff --git a/Documentation/mainboard/hp/2170p.md b/Documentation/mainboard/hp/2170p.md index 5f67c38b11..6b8060e195 100644 --- a/Documentation/mainboard/hp/2170p.md +++ b/Documentation/mainboard/hp/2170p.md @@ -74,7 +74,7 @@ The EHCI debug port is the left USB3 port. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Sandy/Ivy Bridge (FCPGA988) | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/2560p.md b/Documentation/mainboard/hp/2560p.md index 65a87d1068..4565171c0e 100644 --- a/Documentation/mainboard/hp/2560p.md +++ b/Documentation/mainboard/hp/2560p.md @@ -80,7 +80,7 @@ Schematic of this laptop can be found on [Lab One]. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | CPU | Intel Sandy/Ivy Bridge (FCPGA988) | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/8760w.md b/Documentation/mainboard/hp/8760w.md index 857a1d9558..9646ba9163 100644 --- a/Documentation/mainboard/hp/8760w.md +++ b/Documentation/mainboard/hp/8760w.md @@ -7,7 +7,7 @@ checkout the [code on gerrit] to build coreboot for the laptop. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+------------+ | Type | Value | +=====================+============+ @@ -66,7 +66,7 @@ clip to read and flash the chip. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/compaq_8200_sff.md b/Documentation/mainboard/hp/compaq_8200_sff.md index 72df9e3e02..f0783975dd 100644 --- a/Documentation/mainboard/hp/compaq_8200_sff.md +++ b/Documentation/mainboard/hp/compaq_8200_sff.md @@ -13,7 +13,7 @@ The following things are still missing from this coreboot port: ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-------------------------+ | Type | Value | +=====================+=========================+ @@ -128,7 +128,7 @@ as otherwise there's not enough space near the flash. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/compaq_8300_usdt.md b/Documentation/mainboard/hp/compaq_8300_usdt.md index c2800b3f3f..4c2989a3a5 100644 --- a/Documentation/mainboard/hp/compaq_8300_usdt.md +++ b/Documentation/mainboard/hp/compaq_8300_usdt.md @@ -5,7 +5,7 @@ from [HP]. ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-------------+ | Type | Value | +=====================+=============+ @@ -42,7 +42,7 @@ Wake on LAN is active works great. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ diff --git a/Documentation/mainboard/hp/elitebook_820_g2.md b/Documentation/mainboard/hp/elitebook_820_g2.md index 5d35c30211..6fafbe1758 100644 --- a/Documentation/mainboard/hp/elitebook_820_g2.md +++ b/Documentation/mainboard/hp/elitebook_820_g2.md @@ -124,7 +124,7 @@ The board can be debugged with EHCI debug. The EHCI debug port is the USB port o ## Technology -```eval_rst +```{eval-rst} +------------------+-----------------------------+ | SoC | Intel Broadwell | +------------------+-----------------------------+ diff --git a/Documentation/mainboard/hp/folio_9480m.md b/Documentation/mainboard/hp/folio_9480m.md index 0fededfda4..912bf93664 100644 --- a/Documentation/mainboard/hp/folio_9480m.md +++ b/Documentation/mainboard/hp/folio_9480m.md @@ -138,7 +138,7 @@ The board can be debugged with EHCI debug. The EHCI debug port is the USB port o ## Technology -```eval_rst +```{eval-rst} +------------------+-----------------------------+ | CPU | Intel Haswell-ULT | +------------------+-----------------------------+ diff --git a/Documentation/mainboard/hp/z220_sff.md b/Documentation/mainboard/hp/z220_sff.md index 11676208ac..303b59aecf 100644 --- a/Documentation/mainboard/hp/z220_sff.md +++ b/Documentation/mainboard/hp/z220_sff.md @@ -13,7 +13,7 @@ The following things are still missing from this coreboot port: ## Flashing coreboot -```eval_rst +```{eval-rst} +---------------------+-------------+ | Type | Value | +=====================+=============+ @@ -58,7 +58,7 @@ even interchangeable, so should do coreboot images built for them. ## Technology -```eval_rst +```{eval-rst} +------------------+--------------------------------------------------+ | Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | +------------------+--------------------------------------------------+ |