diff options
Diffstat (limited to 'Documentation/Intel')
| -rw-r--r-- | Documentation/Intel/SoC/soc.html | 84 | ||||
| -rw-r--r-- | Documentation/Intel/index.html | 3 |
2 files changed, 75 insertions, 12 deletions
diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html index 3e72da3aa9..5a0a442161 100644 --- a/Documentation/Intel/SoC/soc.html +++ b/Documentation/Intel/SoC/soc.html @@ -566,21 +566,83 @@ Use the following steps to debug the call to TempRamInit: <h2>FADT</h2> <p> The EDK2 module - CorebootModulePkg/CbSupportPei/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CbSupportPei/CbSupportPei.c#l342">CbSupportPei.c</a> - requires that the FADT contains the following values: + CorebootModulePkg/Library/CbParseLib/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbParseLib/CbParseLib.c#l450">CbParseLib.c</a> + requires that the FADT contains the values in the table below. + These values are placed into a HOB identified by + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CorebootModulePkg.dec#l36">gUefiAcpiBoardInfoGuid</a> + by routine + CorebootModulePkg/CbSupportPei/CbSupportPei/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CbSupportPei/CbSupportPei.c#l364">CbPeiEntryPoint</a>. </p> <table border="1"> <tr bgcolor="#c0ffc0"> - <td>EDK2 Field</td> <td>Coreboot Field</td> + <td>EDK2 Field</td> + <td>gUefiAcpiBoardInfoGuid</td> + <td>Use</li> + <td> + <a target="_blank" href="http://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf">ACPI Spec.</a> + Section + </td> + </tr> + <tr> + <td>gpe0_blk<br>gpe0_blk_len</td> + <td>Gpe0Blk<br>Gpe0BlkLen</td> + <td> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbParseLib/CbParseLib.c#l477">PmGpeEnBase</a> + </td> + <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l129">Shutdown</a></td> + <td>4.8.4.1</td> + </tr> + <tr> + <td>pm1a_cnt_blk</td> + <td>Pm1aCntBlk</td> + <td>PmCtrlRegBase</td> + <td> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l139">Shutdown</a><br> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l40">Suspend</a> + </td> + <td>4.8.3.2.1</td> + </tr> + <tr> + <td>pm1a_evt_blk</td> + <td>Pm1aEvtBlk</td> + <td>PmEvtBase</td> + <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l134">Shutdown</a></td> + <td>4.8.3.1.1</td> + </tr> + <tr> + <td>pm_tmr_blk</td> + <td>PmTmrBlk</td> + <td>PmTimerRegBase</td> + <td> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#l55">Timer</a> + </td> + <td>4.8.3.3</td> + </tr> + <tr> + <td>reset_reg.</td> + <td>ResetReg.Address</td> + <td>ResetRegAddress</td> + <td> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> + and + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> + resets + </td> + <td>4.3.3.6</td> + </tr> + <tr> + <td>reset_value</td> + <td>ResetValue</td> + <td>ResetValue</td> + <td> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> + and + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> + resets + </td> + <td>4.8.3.6</td> </tr> - <tr><td>Pm1aCntBlk</td><td>pm1a_cnt_blk</td></tr> - <tr><td>PmTmrBlk</td><td>pm_tmr_blk</td></tr> - <tr><td>ResetReg.Address</td><td>reset_reg.</td></tr> - <tr><td>ResetValue</td><td>reset_value</td></tr> - <tr><td>Pm1aEvtBlk</td><td>pm1a_evt_blk</td></tr> - <tr><td>Gpe0Blk</td><td>gpe0_blk</td></tr> - <tr><td>Gpe0BlkLen</td><td>gpe0_blk_len</td></tr> </table> <p> The EDK2 data structure is defined in @@ -603,6 +665,6 @@ Use the following steps to debug the call to TempRamInit: <hr> -<p>Modified: 20 February 2016</p> +<p>Modified: 28 February 2016</p> </body> </html>
\ No newline at end of file diff --git a/Documentation/Intel/index.html b/Documentation/Intel/index.html index 5a622a9dd9..61d14c861f 100644 --- a/Documentation/Intel/index.html +++ b/Documentation/Intel/index.html @@ -30,6 +30,7 @@ <h1>Documentation</h1> <ul> + <li><a target="_blank" href="http://www.uefi.org/sites/default/files/resources/ACPI_6.0.pdf">ACPI 6.0 Specification</a></li> <li>Get the <a target="_blank" href="https://www.coreboot.org/Git">coreboot source</li> <li>Intel® 64 and IA-32 Architectures <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf">Software Developer Manual</a></li> <li>Intel® Firmware Support Package External Architecture Specification <a target="_blank" href="http://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/fsp-architecture-spec-v1-1.pdf">V1.1</a></li> @@ -37,6 +38,6 @@ <hr> -<p>Modified: 31 January 2016</p> +<p>Modified: 28 February 2016</p> </body> </html>
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