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</head>
<body>
-<h1>Intel&reg; x86 Coreboot/FSP Development Process</h1>
+<h1>Intel&reg; x86 coreboot/FSP Development Process</h1>
<p>
The x86 development process for coreboot is broken into the following components:
</p>
<ul>
- <li>Coreboot <a target="_blank" href="SoC/soc.html">SoC</a> development</li>
- <li>Coreboot <a target="_blank" href="Board/board.html">mainboard</a> development</li>
+ <li>coreboot <a target="_blank" href="SoC/soc.html">SoC</a> development</li>
+ <li>coreboot <a target="_blank" href="Board/board.html">mainboard</a> development</li>
<li><a target="_blank" href="fsp1_1.html">FSP 1.1</a> integration</li>
</ul>
<p>
@@ -22,7 +22,7 @@
<li>Adding coreboot features</li>
</ol>
-<h2>Minimal Coreboot</h2>
+<h2>Minimal coreboot</h2>
<p>
The combined steps below describe how to bring up a minimal coreboot for a
system-on-a-chip (SoC) and a development board: