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-rw-r--r--src/soc/mediatek/mt8186/mt6366.c17
1 files changed, 12 insertions, 5 deletions
diff --git a/src/soc/mediatek/mt8186/mt6366.c b/src/soc/mediatek/mt8186/mt6366.c
index 9ca7c05253..90ff3287d4 100644
--- a/src/soc/mediatek/mt8186/mt6366.c
+++ b/src/soc/mediatek/mt8186/mt6366.c
@@ -420,6 +420,12 @@ static const int vddq_votrim[] = {
80000, 70000, 60000, 50000, 40000, 30000, 20000, 10000,
};
+static void mt6366_protect_control(bool en_protect)
+{
+ /* Write a magic number 0x9CA7 to disable protection */
+ pwrap_write_field(PMIC_TOP_TMA_KEY, en_protect ? 0 : 0x9CA7, 0xFFFF, 0);
+}
+
static u32 pmic_read_efuse(int i)
{
u32 efuse_data = 0;
@@ -591,9 +597,9 @@ static void pmic_set_vddq_vol(u32 vddq_uv)
assert(cali_trim < ARRAY_SIZE(vddq_votrim));
}
- pwrap_write_field(PMIC_TOP_TMA_KEY, 0x9CA7, 0xFFFF, 0);
+ mt6366_protect_control(false);
pwrap_write_field(PMIC_VDDQ_ELR_0, cali_trim, 0xF, 0);
- pwrap_write_field(PMIC_TOP_TMA_KEY, 0, 0xFFFF, 0);
+ mt6366_protect_control(true);
udelay(1);
}
@@ -779,10 +785,12 @@ static void pmic_wdt_set(void)
static void mt6366_init_setting(void)
{
+ mt6366_protect_control(false);
for (size_t i = 0; i < ARRAY_SIZE(init_setting); i++)
pwrap_write_field(
init_setting[i].addr, init_setting[i].val,
init_setting[i].mask, init_setting[i].shift);
+ mt6366_protect_control(true);
}
static void wk_sleep_voltage_by_ddr(void)
@@ -793,11 +801,10 @@ static void wk_sleep_voltage_by_ddr(void)
static void wk_power_down_seq(void)
{
- /* Write TMA KEY with magic number */
- pwrap_write_field(PMIC_TOP_TMA_KEY, 0x9CA7, 0xFFFF, 0);
+ mt6366_protect_control(false);
/* Set VPROC12 sequence to VA12 */
pwrap_write_field(PMIC_CPSDSA4, 0xA, 0x1F, 0);
- pwrap_write_field(PMIC_TOP_TMA_KEY, 0x0, 0xFFFF, 0);
+ mt6366_protect_control(true);
}
static void mt6366_lp_setting(void)