diff options
| -rw-r--r-- | src/drivers/genesyslogic/gl9750/Kconfig | 8 | ||||
| -rw-r--r-- | src/drivers/genesyslogic/gl9750/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/drivers/genesyslogic/gl9750/gl9750.c | 50 | ||||
| -rw-r--r-- | src/drivers/genesyslogic/gl9750/gl9750.h | 13 | ||||
| -rw-r--r-- | src/include/device/pci_ids.h | 3 |
5 files changed, 74 insertions, 1 deletions
diff --git a/src/drivers/genesyslogic/gl9750/Kconfig b/src/drivers/genesyslogic/gl9750/Kconfig new file mode 100644 index 0000000000..f3449b0d87 --- /dev/null +++ b/src/drivers/genesyslogic/gl9750/Kconfig @@ -0,0 +1,8 @@ +config DRIVERS_GENESYSLOGIC_GL9750 + bool "Genesys Logic GL9750" + help + GL9750 is a PCI Express Rev. 1.1 compliant card reader controller + which integrates PCI Express PHY, memory card access interface, + regulators (3.3V-to-1.2V) and card power switch. Enabling this driver + will disable L0s support, which will allow the device to enter the + PCIe L1 link state. diff --git a/src/drivers/genesyslogic/gl9750/Makefile.inc b/src/drivers/genesyslogic/gl9750/Makefile.inc new file mode 100644 index 0000000000..0f771cc335 --- /dev/null +++ b/src/drivers/genesyslogic/gl9750/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_GENESYSLOGIC_GL9750) += gl9750.c diff --git a/src/drivers/genesyslogic/gl9750/gl9750.c b/src/drivers/genesyslogic/gl9750/gl9750.c new file mode 100644 index 0000000000..ca5cd096a5 --- /dev/null +++ b/src/drivers/genesyslogic/gl9750/gl9750.c @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* Driver for Genesys Logic GL9750 */ + +#include <console/console.h> +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ops.h> +#include <device/pci_ids.h> +#include "gl9750.h" + +static void gl9750_enable(struct device *dev) +{ + printk(BIOS_INFO, "GL9750: configure ASPM\n"); + + /* Set Vendor Config to be configurable */ + pci_or_config32(dev, CFG, CFG_EN); + + /* + * When both ASPM L0s and L1 are supported, GL9750 may not enter L1. + * So disable L0s support. + */ + pci_and_config32(dev, CFG2, ~CFG2_L0S_SUPPORT); + + /* Set Vendor Config to be non-configurable */ + pci_and_config32(dev, CFG, ~CFG_EN); +} + +static struct device_operations gl9750_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .ops_pci = &pci_dev_ops_pci, + .enable = gl9750_enable +}; + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_GLI_9750, + 0 +}; + +static const struct pci_driver genesyslogic_gl9750 __pci_driver = { + .ops = &gl9750_ops, + .vendor = PCI_VENDOR_ID_GLI, + .devices = pci_device_ids, +}; + +struct chip_operations drivers_generic_genesyslogic_gl9750_ops = { + CHIP_NAME("Genesys Logic GL9750") +}; diff --git a/src/drivers/genesyslogic/gl9750/gl9750.h b/src/drivers/genesyslogic/gl9750/gl9750.h new file mode 100644 index 0000000000..e446caefb9 --- /dev/null +++ b/src/drivers/genesyslogic/gl9750/gl9750.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef DRIVERS_GENESYSLOGIC_GL9750_H +#define DRIVERS_GENESYSLOGIC_GL9750_H + +/* Definitions for Genesys Logic GL9750 */ + +#define CFG 0x800 +#define CFG_EN 0x1 +#define CFG2 0x848 +#define CFG2_L0S_SUPPORT (0x1 << 6) + +#endif /* DRIVERS_GENESYSLOGIC_GL9750_H */ diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c6ef12188f..fc82c268ec 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2064,8 +2064,9 @@ #define PCI_DEVICE_ID_ALTIMA_AC9100 0x03ea #define PCI_VENDOR_ID_GLI 0x17a0 -#define PCI_DEVICE_ID_GLI_9763E 0xe763 +#define PCI_DEVICE_ID_GLI_9750 0x9750 #define PCI_DEVICE_ID_GLI_9755 0x9755 +#define PCI_DEVICE_ID_GLI_9763E 0xe763 #define PCI_VENDOR_ID_XGI 0x18ca #define PCI_DEVICE_ID_XGI_20 0x0020 |