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-rw-r--r--src/soc/intel/common/block/cse/cse.c16
-rw-r--r--src/soc/intel/common/block/include/intelblocks/cse.h6
2 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 05b67eed32..7d6fabaa9b 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -257,6 +257,22 @@ bool cse_is_hfs1_com_soft_temp_disable(void)
return cse_check_hfs1_com(ME_HFS1_COM_SOFT_TEMP_DISABLE);
}
+/*
+ * TGL HFSTS1.spi_protection_mode bit replaces the previous
+ * `manufacturing mode (mfg_mode)` without changing the offset and purpose
+ * of this bit.
+ *
+ * Using HFSTS1.mfg_mode to get the SPI protection status for all PCH.
+ * mfg_mode = 0 means SPI protection in on.
+ * mfg_mode = 1 means SPI is unprotected.
+ */
+bool cse_is_hfs1_spi_protected(void)
+{
+ union me_hfsts1 hfs1;
+ hfs1.data = me_read_config32(PCI_ME_HFSTS1);
+ return !hfs1.fields.mfg_mode;
+}
+
bool cse_is_hfs3_fw_sku_lite(void)
{
union me_hfsts3 hfs3;
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index 68f1d3c2a8..540dabc76c 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -301,6 +301,12 @@ bool cse_is_hfs1_com_secover_mei_msg(void);
bool cse_is_hfs1_com_soft_temp_disable(void);
/*
+ * Checks CSE's spi protection mode is protected or unprotected.
+ * Returns true if CSE's spi protection mode is protected, otherwise false.
+ */
+bool cse_is_hfs1_spi_protected(void);
+
+/*
* Checks CSE's Firmware SKU is Lite or not.
* Returns true if CSE's Firmware SKU is Lite, otherwise false
*/