diff options
| -rw-r--r-- | src/mainboard/google/brya/Kconfig.name | 6 | ||||
| -rw-r--r-- | src/mainboard/intel/adlrvp/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/Kconfig | 8 | ||||
| -rw-r--r-- | src/soc/intel/common/block/usb4/Kconfig | 8 |
4 files changed, 14 insertions, 10 deletions
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 842453f4bc..53a60e316f 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -1,22 +1,22 @@ config BOARD_GOOGLE_BRYA0 bool "Brya 0" select BOARD_GOOGLE_BASEBOARD_BRYA - select ADL_ENABLE_USB4_PCIE_RESOURCES select DRIVERS_GENESYSLOGIC_GL9755 select DRIVERS_INTEL_MIPI_CAMERA select SOC_INTEL_COMMON_BLOCK_IPU + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config BOARD_GOOGLE_BRASK bool "Brask" select BOARD_GOOGLE_BASEBOARD_BRASK - select ADL_ENABLE_USB4_PCIE_RESOURCES select SOC_INTEL_CRASHLOG + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config BOARD_GOOGLE_PRIMUS bool "-> Primus" select BOARD_GOOGLE_BASEBOARD_BRYA - select ADL_ENABLE_USB4_PCIE_RESOURCES select DRIVERS_GENESYSLOGIC_GL9755 + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config BOARD_GOOGLE_GIMBLE bool "-> Gimble" diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig index 42ff3bdc00..4a59c8bd2e 100644 --- a/src/mainboard/intel/adlrvp/Kconfig +++ b/src/mainboard/intel/adlrvp/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M | config BOARD_SPECIFIC_OPTIONS def_bool y - select ADL_ENABLE_USB4_PCIE_RESOURCES select BOARD_ROMSIZE_KB_32768 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES @@ -26,6 +25,7 @@ config BOARD_SPECIFIC_OPTIONS select FW_CONFIG_SOURCE_CHROMEEC_CBI if BOARD_INTEL_ADLRVP_M_EXT_EC select MAINBOARD_HAS_TPM2 if BOARD_INTEL_ADLRVP_M_EXT_EC select MAINBOARD_HAS_SPI_TPM_CR50 if BOARD_INTEL_ADLRVP_M_EXT_EC + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES select SPI_TPM if BOARD_INTEL_ADLRVP_M_EXT_EC config CHROMEOS diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 1e16b42bcb..e2116c787e 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -148,11 +148,7 @@ config HEAP_SIZE # - 42 buses # - 194 MiB Non-prefetchable memory # - 448 MiB Prefetchable memory -config ADL_ENABLE_USB4_PCIE_RESOURCES - def_bool n - select PCIEXP_HOTPLUG - -if ADL_ENABLE_USB4_PCIE_RESOURCES +if SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config PCIEXP_HOTPLUG_BUSES int @@ -166,7 +162,7 @@ config PCIEXP_HOTPLUG_PREFETCH_MEM hex default 0x1c000000 -endif # ADL_ENABLE_USB4_PCIE_RESOURCES +endif # SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config MAX_PCH_ROOT_PORTS int diff --git a/src/soc/intel/common/block/usb4/Kconfig b/src/soc/intel/common/block/usb4/Kconfig index fb876e1fd9..d4e1c25aa1 100644 --- a/src/soc/intel/common/block/usb4/Kconfig +++ b/src/soc/intel/common/block/usb4/Kconfig @@ -18,3 +18,11 @@ config SOC_INTEL_COMMON_BLOCK_USB4_XHCI help Minimal PCI driver for adding PCI ops and SSDT generation for common Intel USB4/Thunderbolt North XHCI ports. + +config SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES + bool + default n + depends on SOC_INTEL_COMMON_BLOCK_USB4 + select PCIEXP_HOTPLUG + help + Enable USB4 PCIe resources for reserving hotplug busses and memory. |