diff options
-rw-r--r-- | src/soc/intel/broadwell/include/soc/pch.h | 6 | ||||
-rw-r--r-- | src/soc/intel/broadwell/pch/adsp.c | 1 | ||||
-rw-r--r-- | src/soc/intel/broadwell/pch/lpc.c | 1 | ||||
-rw-r--r-- | src/soc/intel/broadwell/pch/pch.c | 15 |
4 files changed, 14 insertions, 9 deletions
diff --git a/src/soc/intel/broadwell/include/soc/pch.h b/src/soc/intel/broadwell/include/soc/pch.h index cf27499fe5..118dad0213 100644 --- a/src/soc/intel/broadwell/include/soc/pch.h +++ b/src/soc/intel/broadwell/include/soc/pch.h @@ -3,6 +3,8 @@ #ifndef _BROADWELL_PCH_H_ #define _BROADWELL_PCH_H_ +#include <stdbool.h> + /* Haswell ULT Pch (LynxPoint-LP) */ #define PCH_LPT_LP_SAMPLE 0x9c41 #define PCH_LPT_LP_PREMIUM 0x9c43 @@ -25,8 +27,8 @@ u8 pch_revision(void); u16 pch_type(void); -int pch_is_wpt(void); -int pch_is_wpt_ulx(void); +bool pch_is_wpt(void); +bool pch_is_wpt_ulx(void); u32 pch_read_soft_strap(int id); void pch_disable_devfn(struct device *dev); diff --git a/src/soc/intel/broadwell/pch/adsp.c b/src/soc/intel/broadwell/pch/adsp.c index 7da807a6fd..05b1e60af2 100644 --- a/src/soc/intel/broadwell/pch/adsp.c +++ b/src/soc/intel/broadwell/pch/adsp.c @@ -13,6 +13,7 @@ #include <soc/rcba.h> #include <soc/intel/broadwell/pch/chip.h> #include <southbridge/intel/lynxpoint/iobp.h> +#include <stdbool.h> static void adsp_init(struct device *dev) { diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c index 8a703df395..49a36b148a 100644 --- a/src/soc/intel/broadwell/pch/lpc.c +++ b/src/soc/intel/broadwell/pch/lpc.c @@ -22,6 +22,7 @@ #include <southbridge/intel/common/rtc.h> #include <southbridge/intel/lynxpoint/iobp.h> #include <southbridge/intel/lynxpoint/lp_gpio.h> +#include <stdbool.h> static void pch_enable_ioapic(struct device *dev) { diff --git a/src/soc/intel/broadwell/pch/pch.c b/src/soc/intel/broadwell/pch/pch.c index ddb51ccf12..fa03d7359a 100644 --- a/src/soc/intel/broadwell/pch/pch.c +++ b/src/soc/intel/broadwell/pch/pch.c @@ -10,6 +10,7 @@ #include <soc/serialio.h> #include <soc/spi.h> #include <southbridge/intel/lynxpoint/iobp.h> +#include <stdbool.h> u8 pch_revision(void) { @@ -21,14 +22,14 @@ u16 pch_type(void) return pci_read_config16(PCH_DEV_LPC, PCI_DEVICE_ID); } -/* Return 1 if PCH type is WildcatPoint */ -int pch_is_wpt(void) +/* Return true if PCH type is WildcatPoint */ +bool pch_is_wpt(void) { - return ((pch_type() & 0xfff0) == 0x9cc0) ? 1 : 0; + return ((pch_type() & 0xfff0) == 0x9cc0) ? true : false; } -/* Return 1 if PCH type is WildcatPoint ULX */ -int pch_is_wpt_ulx(void) +/* Return true if PCH type is WildcatPoint ULX */ +bool pch_is_wpt_ulx(void) { u16 lpcid = pch_type(); @@ -36,10 +37,10 @@ int pch_is_wpt_ulx(void) case PCH_WPT_BDW_Y_SAMPLE: case PCH_WPT_BDW_Y_PREMIUM: case PCH_WPT_BDW_Y_BASE: - return 1; + return true; } - return 0; + return false; } u32 pch_read_soft_strap(int id) |