diff options
| -rw-r--r-- | src/mainboard/google/rush/mainboard.c | 42 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra132/i2c6.c | 21 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra132/include/soc/padconfig.h | 2 |
3 files changed, 55 insertions, 10 deletions
diff --git a/src/mainboard/google/rush/mainboard.c b/src/mainboard/google/rush/mainboard.c index 0b85cc0356..2ea0841138 100644 --- a/src/mainboard/google/rush/mainboard.c +++ b/src/mainboard/google/rush/mainboard.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2014 Google Inc. + * Copyright 2015 Google Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -32,6 +32,9 @@ #include <soc/nvidia/tegra/dc.h> #include <soc/display.h> +#include <vendorcode/google/chromeos/chromeos.h> +#include <delay.h> + static const struct pad_config sdmmc3_pad[] = { /* MMC3(SDCARD) */ PAD_CFG_SFIO(SDMMC3_CLK, PINMUX_INPUT_ENABLE, SDMMC3), @@ -68,6 +71,18 @@ static const struct pad_config padcfgs[] = { * voltage source likes to drive them low on overcurrent conditions */ PAD_CFG_GPIO_INPUT(USB_VBUS_EN0, PINMUX_PULL_UP), PAD_CFG_GPIO_INPUT(USB_VBUS_EN1, PINMUX_PULL_UP), + + /* backlight_vdd_gpio: P2 */ + PAD_CFG_GPIO_OUT0(DAP3_DOUT, PINMUX_PULL_NONE), + + /* backlight_en_gpio: H2 */ + PAD_CFG_GPIO_OUT0(GPIO_PH2, PINMUX_PULL_NONE), + + /* backlight_pwm: H1 */ + PAD_CFG_SFIO(GPIO_PH1, PINMUX_PULL_NONE, PWM1), + + /* DP HPD */ + PAD_CFG_SFIO(DP_HPD, PINMUX_INPUT_ENABLE, DP), }; static const struct pad_config i2c1_pad[] = { @@ -112,6 +127,27 @@ static const struct funit_cfg audio_funit[] = { FUNIT_CFG(I2S1, CLK_M, 1500, i2s1_pad, ARRAY_SIZE(i2s1_pad)), }; +static void configure_display_clocks(void) +{ + u32 lclks = CLK_L_DISP1 | CLK_L_HOST1X | CLK_L_PWM; + u32 xclks = CLK_X_DPAUX | CLK_X_SOR0; + + clock_enable_clear_reset(lclks, 0, 0, 0, 0, xclks); + + /* Give clocks time to stabilize. */ + udelay(IO_STABILIZATION_DELAY); +} + +static int configure_display_blocks(void) +{ + soc_configure_host1x(); + + /* enable display related clocks */ + configure_display_clocks(); + + return 0; +} + /* Audio init: clocks and enables/resets */ static void setup_audio(void) { @@ -146,6 +182,10 @@ static void mainboard_init(device_t dev) setup_audio(); i2c_init(I2C1_BUS); /* for max98090 codec */ + + /* if panel needs to bringup */ + if (!vboot_skip_display_init()) + configure_display_blocks(); } void display_startup(device_t dev) diff --git a/src/soc/nvidia/tegra132/i2c6.c b/src/soc/nvidia/tegra132/i2c6.c index 86373d621e..73a98562ad 100644 --- a/src/soc/nvidia/tegra132/i2c6.c +++ b/src/soc/nvidia/tegra132/i2c6.c @@ -83,14 +83,7 @@ void soc_configure_i2c6pad(void) * and put Host1X back in reset. DPAUX must remain out of * reset and the SOR partition must remained unpowergated. */ - power_ungate_partition(POWER_PARTID_SOR); - - /* Host1X needs a valid clock source so DPAUX can be accessed */ - clock_configure_source(host1x, PLLP, 204000); - - enable_sor_periph_clocks(); - remove_clamps(POWER_PARTID_SOR); - unreset_sor_periphs(); + soc_configure_host1x(); /* Now we can write the I2C6 mux in DPAUX */ write32(I2C6_PADCTL, (void *)DPAUX_HYBRID_PADCTL); @@ -106,3 +99,15 @@ void soc_configure_i2c6pad(void) disable_sor_periph_clocks(); clock_set_reset_l(CLK_L_HOST1X); } + +void soc_configure_host1x(void) +{ + power_ungate_partition(POWER_PARTID_SOR); + + /* Host1X needs a valid clock source so DPAUX can be accessed. */ + clock_configure_source(host1x, PLLP, 204000); + + enable_sor_periph_clocks(); + remove_clamps(POWER_PARTID_SOR); + unreset_sor_periphs(); +} diff --git a/src/soc/nvidia/tegra132/include/soc/padconfig.h b/src/soc/nvidia/tegra132/include/soc/padconfig.h index 569fe4624c..843b4ee1cd 100644 --- a/src/soc/nvidia/tegra132/include/soc/padconfig.h +++ b/src/soc/nvidia/tegra132/include/soc/padconfig.h @@ -87,5 +87,5 @@ struct pad_config { void soc_configure_pads(const struct pad_config * const entries, size_t num); /* I2C6 requires special init as its pad lives int the SOR/DPAUX block */ void soc_configure_i2c6pad(void); - +void soc_configure_host1x(void); #endif /* __SOC_NVIDIA_TEGRA132_PAD_CFG_H */ |