diff options
| -rw-r--r-- | src/mainboard/intel/archercity_crb/util.c | 3 | ||||
| -rw-r--r-- | src/mainboard/inventec/transformers/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/inventec/transformers/util.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/Makefile.mk | 2 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/config.c | 8 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/include/soc/chip_common.h | 6 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/include/soc/config.h | 14 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/include/soc/util.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/uncore.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/util.c | 5 |
11 files changed, 29 insertions, 17 deletions
diff --git a/src/mainboard/intel/archercity_crb/util.c b/src/mainboard/intel/archercity_crb/util.c index 0dac1e1651..33afeca8d3 100644 --- a/src/mainboard/intel/archercity_crb/util.c +++ b/src/mainboard/intel/archercity_crb/util.c @@ -1,8 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <drivers/ocp/include/vpd.h> -#include <soc/chip_common.h> -#include <soc/util.h> +#include <soc/config.h> #if CONFIG(SOC_INTEL_HAS_CXL) && CONFIG(OCP_VPD) enum xeonsp_cxl_mode get_cxl_mode(void) diff --git a/src/mainboard/inventec/transformers/romstage.c b/src/mainboard/inventec/transformers/romstage.c index 1abcf708a9..25ff2d6226 100644 --- a/src/mainboard/inventec/transformers/romstage.c +++ b/src/mainboard/inventec/transformers/romstage.c @@ -6,6 +6,7 @@ #include <drivers/ipmi/ipmi_if.h> #include <drivers/ipmi/ocp/ipmi_ocp.h> #include <drivers/ocp/ewl/ocp_ewl.h> +#include <soc/config.h> #include <soc/romstage.h> #include <defs_cxl.h> #include <defs_iio.h> diff --git a/src/mainboard/inventec/transformers/util.c b/src/mainboard/inventec/transformers/util.c index 5197b23292..7b9237c639 100644 --- a/src/mainboard/inventec/transformers/util.c +++ b/src/mainboard/inventec/transformers/util.c @@ -1,8 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <drivers/ocp/include/vpd.h> -#include <soc/chip_common.h> -#include <soc/util.h> +#include <soc/config.h> #if CONFIG(SOC_INTEL_HAS_CXL) enum xeonsp_cxl_mode get_cxl_mode(void) diff --git a/src/soc/intel/xeon_sp/Makefile.mk b/src/soc/intel/xeon_sp/Makefile.mk index 3ebc6e0c4a..35b998c850 100644 --- a/src/soc/intel/xeon_sp/Makefile.mk +++ b/src/soc/intel/xeon_sp/Makefile.mk @@ -10,10 +10,12 @@ subdirs-$(CONFIG_SOC_INTEL_GRANITERAPIDS) += gnr ebg bootblock-y += bootblock.c spi.c lpc.c pch.c report_platform.c romstage-y += romstage.c reset.c util.c spi.c pmutil.c memmap.c ddr.c +romstage-y += config.c romstage-y += ../../../cpu/intel/car/romstage.c ramstage-y += uncore.c reset.c util.c lpc.c spi.c ramstage.c chip_common.c ramstage-y += memmap.c pch.c lockdown.c finalize.c ramstage-y += numa.c +ramstage-y += config.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC) += pmc.c pmutil.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += uncore_acpi.c acpi.c ramstage-$(CONFIG_SOC_INTEL_HAS_CXL) += uncore_acpi_cxl.c diff --git a/src/soc/intel/xeon_sp/config.c b/src/soc/intel/xeon_sp/config.c new file mode 100644 index 0000000000..c2a908c984 --- /dev/null +++ b/src/soc/intel/xeon_sp/config.c @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/config.h> + +__weak enum xeonsp_cxl_mode get_cxl_mode(void) +{ + return XEONSP_CXL_DISABLED; +} diff --git a/src/soc/intel/xeon_sp/include/soc/chip_common.h b/src/soc/intel/xeon_sp/include/soc/chip_common.h index 5bdc87fbf5..5fd5dc6f18 100644 --- a/src/soc/intel/xeon_sp/include/soc/chip_common.h +++ b/src/soc/intel/xeon_sp/include/soc/chip_common.h @@ -33,12 +33,6 @@ static inline void init_xeon_domain_path(struct device_path *path, int socket, path->domain.domain = dp.domain_path; }; -enum xeonsp_cxl_mode { - XEONSP_CXL_DISABLED = 0, - XEONSP_CXL_SYS_MEM, - XEONSP_CXL_SP_MEM, -}; - /* * Every STACK can have multiple PCI domains with an unique domain type. * This is only of cosmetic nature and generates more readable ACPI code, diff --git a/src/soc/intel/xeon_sp/include/soc/config.h b/src/soc/intel/xeon_sp/include/soc/config.h new file mode 100644 index 0000000000..6d5f3d587d --- /dev/null +++ b/src/soc/intel/xeon_sp/include/soc/config.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _XEON_SP_SOC_CONFIG_H_ +#define _XEON_SP_SOC_CONFIG_H_ + +enum xeonsp_cxl_mode { + XEONSP_CXL_DISABLED = 0, + XEONSP_CXL_SYS_MEM, + XEONSP_CXL_SP_MEM, +}; + +enum xeonsp_cxl_mode get_cxl_mode(void); + +#endif diff --git a/src/soc/intel/xeon_sp/include/soc/util.h b/src/soc/intel/xeon_sp/include/soc/util.h index af749023b5..e694af3e3c 100644 --- a/src/soc/intel/xeon_sp/include/soc/util.h +++ b/src/soc/intel/xeon_sp/include/soc/util.h @@ -31,6 +31,4 @@ void bios_done_msr(void *unused); union p2sb_bdf soc_get_hpet_bdf(void); union p2sb_bdf soc_get_ioapic_bdf(void); -enum xeonsp_cxl_mode get_cxl_mode(void); - #endif diff --git a/src/soc/intel/xeon_sp/spr/romstage.c b/src/soc/intel/xeon_sp/spr/romstage.c index c339506573..26bb3081a1 100644 --- a/src/soc/intel/xeon_sp/spr/romstage.c +++ b/src/soc/intel/xeon_sp/spr/romstage.c @@ -20,6 +20,7 @@ #include <soc/soc_pch.h> #include <soc/intel/common/smbios.h> #include <string.h> +#include <soc/config.h> #include <soc/soc_util.h> #include <soc/util.h> #include <soc/ddr.h> diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c index 4c226854aa..a6ac7c8be7 100644 --- a/src/soc/intel/xeon_sp/uncore.c +++ b/src/soc/intel/xeon_sp/uncore.c @@ -15,6 +15,7 @@ #include <fsp/util.h> #include <security/intel/txt/txt_platform.h> #include <security/intel/txt/txt.h> +#include <soc/config.h> #include <soc/numa.h> #include <soc/soc_util.h> #include <stdint.h> diff --git a/src/soc/intel/xeon_sp/util.c b/src/soc/intel/xeon_sp/util.c index 2fdf45e04f..4dbe7a4cd7 100644 --- a/src/soc/intel/xeon_sp/util.c +++ b/src/soc/intel/xeon_sp/util.c @@ -265,8 +265,3 @@ void set_bios_init_completion(void) set_bios_init_completion_for_package(sbsp_socket_id); } #endif - -__weak enum xeonsp_cxl_mode get_cxl_mode(void) -{ - return XEONSP_CXL_DISABLED; -} |