diff options
| -rw-r--r-- | src/mainboard/google/cherry/bootblock.c | 3 | ||||
| -rw-r--r-- | src/mainboard/google/cherry/chromeos.c | 23 | ||||
| -rw-r--r-- | src/mainboard/google/cherry/gpio.h | 18 |
3 files changed, 43 insertions, 1 deletions
diff --git a/src/mainboard/google/cherry/bootblock.c b/src/mainboard/google/cherry/bootblock.c index 6f61a8282b..adb87d03d9 100644 --- a/src/mainboard/google/cherry/bootblock.c +++ b/src/mainboard/google/cherry/bootblock.c @@ -4,6 +4,8 @@ #include <device/mmio.h> #include <soc/gpio.h> +#include "gpio.h" + struct pad_func { u8 pin_id; u8 func; @@ -34,4 +36,5 @@ static void nor_set_gpio_pinmux(void) void bootblock_mainboard_init(void) { nor_set_gpio_pinmux(); + setup_chromeos_gpios(); } diff --git a/src/mainboard/google/cherry/chromeos.c b/src/mainboard/google/cherry/chromeos.c index 3f0937f693..f606ba39fd 100644 --- a/src/mainboard/google/cherry/chromeos.c +++ b/src/mainboard/google/cherry/chromeos.c @@ -2,10 +2,31 @@ #include <bootmode.h> #include <boot/coreboot_tables.h> +#include <gpio.h> -void fill_lb_gpios(struct lb_gpios *gpios) +#include "gpio.h" + +void setup_chromeos_gpios(void) { + gpio_input(GPIO_WP); + gpio_input_pullup(GPIO_EC_AP_INT); + gpio_input_pullup(GPIO_SD_CD); + gpio_input_pullup(GPIO_EC_IN_RW); + gpio_input_pullup(GPIO_GSC_AP_INT); + gpio_output(GPIO_EN_SPK, 0); + gpio_output(GPIO_RESET, 0); +} +void fill_lb_gpios(struct lb_gpios *gpios) +{ + struct lb_gpio chromeos_gpios[] = { + {GPIO_EC_AP_INT.id, ACTIVE_LOW, -1, "EC interrupt"}, + {GPIO_SD_CD.id, ACTIVE_LOW, -1, "SD card detect"}, + {GPIO_EC_IN_RW.id, ACTIVE_LOW, -1, "EC in RW"}, + {GPIO_GSC_AP_INT.id, ACTIVE_LOW, -1, "TPM interrupt"}, + {GPIO_EN_SPK.id, ACTIVE_HIGH, -1, "speaker enable"}, + }; + lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } int get_recovery_mode_switch(void) diff --git a/src/mainboard/google/cherry/gpio.h b/src/mainboard/google/cherry/gpio.h new file mode 100644 index 0000000000..28e11869a8 --- /dev/null +++ b/src/mainboard/google/cherry/gpio.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __MAINBOARD_GOOGLE_CHERRY_GPIO_H__ +#define __MAINBOARD_GOOGLE_CHERRY_GPIO_H__ + +#include <soc/gpio.h> + +#define GPIO_EC_AP_INT GPIO(GPIO_04) +#define GPIO_WP GPIO(GPIO_05) +#define GPIO_SD_CD GPIO(I2SO1_D1) +#define GPIO_EC_IN_RW GPIO(DGI_D10) +#define GPIO_GSC_AP_INT GPIO(DGI_D11) +#define GPIO_EN_SPK GPIO(UART1_RTS) +#define GPIO_RESET GPIO(UART1_CTS) + +void setup_chromeos_gpios(void); + +#endif |