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-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/devicetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
index 7fb3c7e6c8..ac2856e93b 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -342,6 +342,8 @@ chip soc/amd/cezanne
register "hid" = ""GOOG0005""
register "desc" = ""Cr50 TPM""
register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_85)"
+ register "power_managed_mode" = "CONFIG(PSP_S0I3_RESUME_VERSTAGE) ?
+ TPM_KERNEL_POWER_MANAGED : TPM_DEFAULT_POWER_MANAGED"
device i2c 50 alias cr50 on end
end
end