diff options
-rw-r--r-- | src/mainboard/amd/mandolin/emmc_gpio.c | 2 | ||||
-rw-r--r-- | src/mainboard/amd/mandolin/variants/cereme/early_gpio.c | 2 | ||||
-rw-r--r-- | src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c | 2 | ||||
-rw-r--r-- | src/soc/amd/picasso/include/soc/gpio.h | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/amd/mandolin/emmc_gpio.c b/src/mainboard/amd/mandolin/emmc_gpio.c index 2ae72a6ec7..a88a5c59b2 100644 --- a/src/mainboard/amd/mandolin/emmc_gpio.c +++ b/src/mainboard/amd/mandolin/emmc_gpio.c @@ -6,7 +6,7 @@ /* eMMC controller driving either an SD card or eMMC device. */ static const struct soc_amd_gpio emmc_gpios[] = { PAD_NF(GPIO_21, EMMC_CMD, PULL_UP), - PAD_NF(GPIO_22, EMMC_PRW_CTRL, PULL_UP), + PAD_NF(GPIO_22, EMMC_PWR_CTRL, PULL_UP), PAD_NF(GPIO_68, EMMC_CD, PULL_UP), PAD_NF(GPIO_70, EMMC_CLK, PULL_NONE), PAD_NF(GPIO_104, EMMC_DATA0, PULL_UP), diff --git a/src/mainboard/amd/mandolin/variants/cereme/early_gpio.c b/src/mainboard/amd/mandolin/variants/cereme/early_gpio.c index b4ee5f485a..800bd71590 100644 --- a/src/mainboard/amd/mandolin/variants/cereme/early_gpio.c +++ b/src/mainboard/amd/mandolin/variants/cereme/early_gpio.c @@ -13,7 +13,7 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = { /* not USB_OC2_L */ PAD_GPI(GPIO_18, PULL_UP), /* SDIO eMMC power control */ - PAD_NF(GPIO_22, EMMC_PRW_CTRL, PULL_NONE), + PAD_NF(GPIO_22, EMMC_PWR_CTRL, PULL_NONE), /* PCIe Reset 0 */ PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE), /* PCIe Reset 1 */ diff --git a/src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c b/src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c index 678de59b2c..63e01ef5d9 100644 --- a/src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c +++ b/src/mainboard/amd/mandolin/variants/mandolin/early_gpio.c @@ -17,7 +17,7 @@ static const struct soc_amd_gpio gpio_set_stage_reset[] = { /* not USB_OC2_L */ PAD_GPI(GPIO_18, PULL_UP), /* SDIO eMMC power control */ - PAD_NF(GPIO_22, EMMC_PRW_CTRL, PULL_NONE), + PAD_NF(GPIO_22, EMMC_PWR_CTRL, PULL_NONE), /* PCIe SSD power enable */ PAD_GPO(GPIO_23, HIGH), /* PCIe Reset to DP0, DP1, J2105, TP, FP */ diff --git a/src/soc/amd/picasso/include/soc/gpio.h b/src/soc/amd/picasso/include/soc/gpio.h index 8f33ca6ba9..0f4507cd2e 100644 --- a/src/soc/amd/picasso/include/soc/gpio.h +++ b/src/soc/amd/picasso/include/soc/gpio.h @@ -146,7 +146,7 @@ #define GPIO_21_IOMUX_EMMC_CMD 1 #define GPIO_21_IOMUX_GPIOxx 2 #define GPIO_22_IOMUX_LPC_PME_L 0 -#define GPIO_22_IOMUX_EMMC_PRW_CTRL 1 +#define GPIO_22_IOMUX_EMMC_PWR_CTRL 1 #define GPIO_22_IOMUX_GPIOxx 2 #define GPIO_23_IOMUX_AC_PRES 0 #define GPIO_23_IOMUX_SGPIO_LOAD 1 |