diff options
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb | 3 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb index 5ba10eed9f..30e83092d8 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb @@ -94,6 +94,9 @@ chip soc/intel/alderlake # Disable Package C-state demotion for nissa baseboard. register "disable_package_c_state_demotion" = "true" + # Vccin Aux Imon Iccmax, follow RDC#646929 Power Map requirement + register "vccin_aux_imon_iccmax" = "PD_TIER_VOLUME" # 27A + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb index dc0d4807f9..6016a7f03a 100644 --- a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb @@ -44,6 +44,9 @@ chip soc/intel/alderlake register "pch_hda_sdi_enable[0]" = "true" register "pch_hda_sdi_enable[1]" = "true" + # Vccin Aux Imon Iccmax, follow RDC#646929 Power Map requirement + register "vccin_aux_imon_iccmax" = "PD_TIER_VOLUME" # 27A + device domain 0 on # The timing values can be derived from datasheet of display panel # You can use EDID string to identify the type of display on the board |