diff options
| -rw-r--r-- | Documentation/mainboard/up/squared/bottom.dia | bin | 0 -> 1112 bytes | |||
| -rw-r--r-- | Documentation/mainboard/up/squared/bottom.jpg | bin | 38689 -> 48761 bytes | |||
| -rw-r--r-- | Documentation/mainboard/up/squared/header_40pin_gpio_uart1.dia | bin | 0 -> 1853 bytes | |||
| -rw-r--r-- | Documentation/mainboard/up/squared/header_40pin_gpio_uart1.svg | 126 | ||||
| -rw-r--r-- | Documentation/mainboard/up/squared/header_cn16_10pin_uart0.dia | bin | 0 -> 1752 bytes | |||
| -rw-r--r-- | Documentation/mainboard/up/squared/header_cn16_10pin_uart0.svg | 112 | ||||
| -rw-r--r-- | Documentation/mainboard/up/squared/header_cn22_12pin_spi.dia | bin | 0 -> 2240 bytes | |||
| -rw-r--r-- | Documentation/mainboard/up/squared/header_cn22_12pin_spi.svg | 165 | ||||
| -rw-r--r-- | Documentation/mainboard/up/squared/index.md | 102 | ||||
| -rw-r--r-- | Documentation/soc/intel/apollolake/flash_layout.dia | bin | 0 -> 1988 bytes | |||
| -rw-r--r-- | Documentation/soc/intel/apollolake/flash_layout.svg | 122 | ||||
| -rw-r--r-- | Documentation/soc/intel/apollolake/index.md | 17 | ||||
| -rw-r--r-- | Documentation/soc/intel/index.md | 1 |
13 files changed, 629 insertions, 16 deletions
diff --git a/Documentation/mainboard/up/squared/bottom.dia b/Documentation/mainboard/up/squared/bottom.dia Binary files differnew file mode 100644 index 0000000000..f298d669ab --- /dev/null +++ b/Documentation/mainboard/up/squared/bottom.dia diff --git a/Documentation/mainboard/up/squared/bottom.jpg b/Documentation/mainboard/up/squared/bottom.jpg Binary files differindex f9aa85db50..3c066a23ad 100644 --- a/Documentation/mainboard/up/squared/bottom.jpg +++ b/Documentation/mainboard/up/squared/bottom.jpg diff --git a/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.dia b/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.dia Binary files differnew file mode 100644 index 0000000000..4efc0183e4 --- /dev/null +++ b/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.dia diff --git a/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.svg b/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.svg new file mode 100644 index 0000000000..16f6397de4 --- /dev/null +++ b/Documentation/mainboard/up/squared/header_40pin_gpio_uart1.svg @@ -0,0 +1,126 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.0//EN" "http://www.w3.org/TR/2001/PR-SVG-20010719/DTD/svg10.dtd"> +<svg width="14cm" height="10cm" viewBox="399 -216 262 199" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"> + <text font-size="12.8" style="fill: #000000;text-anchor:start;font-family:sans-serif;font-style:normal;font-weight:700" x="460" y="-20"> + <tspan x="460" y="-20">40 pin GPIO header</tspan> + </text> + <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="520" y="-175.575"> + <tspan x="520" y="-175.575">GND</tspan> + </text> + <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="560" y="-203.575"> + <tspan x="560" y="-203.575">UART1</tspan> + <tspan x="560" y="-187.575">TX</tspan> + </text> + <text font-size="12.8" style="fill: #000000;text-anchor:middle;font-family:sans-serif;font-style:normal;font-weight:700" x="600" y="-183.575"> + <tspan x="600" y="-183.575">UART1</tspan> + <tspan x="600" y="-167.575">RX</tspan> + </text> + <g> + <rect style="fill: #ffffff" x="400" y="-140" width="260" height="100"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="400" y="-140" width="260" height="100"/> + </g> + <g> + <rect style="fill: #ffffff" x="420" y="-120" width="20" height="20"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="420" y="-120" width="20" height="20"/> + </g> + <g> + <rect style="fill: #ffffff" x="420" y="-80" width="20" height="20"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="420" y="-80" width="20" height="20"/> + </g> + <g> + <rect style="fill: #00ff00" x="500" y="-120" width="20" height="20"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="500" y="-120" width="20" height="20"/> + </g> + <g> + <rect style="fill: #ffffff" x="500" y="-80" width="20" height="20"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="500" y="-80" width="20" height="20"/> + </g> + <g> + <rect style="fill: #ffffff" x="460" y="-120" width="20" height="20"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="460" y="-120" width="20" height="20"/> + </g> + <g> + <rect style="fill: #ffffff" x="460" y="-80" width="20" height="20"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="460" y="-80" width="20" height="20"/> + </g> + <g> + <rect style="fill: #00ff00" x="540" y="-120" width="20" height="20"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="540" y="-120" width="20" height="20"/> + </g> + <g> + <rect style="fill: #ffffff" x="540" y="-80" width="20" height="20"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="540" y="-80" width="20" height="20"/> + </g> + <g> + <rect style="fill: #00ff00" x="580" y="-120" width="20" height="20"/> + <rect style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" x="580" y="-120" width="20" height="20"/> + </g> + <g> + <rect style="fill: #ffffff" x="580" y="-80" width="20" height="20"/> + <rect style="fill: none; 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Make sure that you have a fully working dump. +```bash +[upsquared]$ ls +firmware_vendor.rom +``` + +```bash +[upsquared]$ mkdir extracted && cd extracted +[extracted]$ ifdtool -x ../firmware_vendor.rom +File ../firmware_vendor.rom is 16777216 bytes +Peculiar firmware descriptor, assuming Ibex Peak compatibility. + Flash Region 0 (Flash Descriptor): 00000000 - 00000fff + Flash Region 1 (BIOS): 00001000 - 00efefff + Flash Region 2 (Intel ME): 07fff000 - 00000fff (unused) + Flash Region 3 (GbE): 07fff000 - 00000fff (unused) + Flash Region 4 (Platform Data): 07fff000 - 00000fff (unused) + Flash Region 5 (Reserved): 00eff000 - 00ffefff + Flash Region 6 (Reserved): 07fff000 - 00000fff (unused) + Flash Region 7 (Reserved): 07fff000 - 00000fff (unused) + Flash Region 8 (EC): 07fff000 - 00000fff (unused) +``` + +```bash +flashregion_0_flashdescriptor.bin +flashregion_1_bios.bin +flashregion_5_reserved.bin +``` + +### Clean up +```bash +[coreboot]$ make distclean +``` + +### Configuring +```bash +[coreboot]$ touch .config +[coreboot]$ ./util/scripts/config --enable VENDOR_UP +[coreboot]$ ./util/scripts/config --enable BOARD_UP_SQUARED +[coreboot]$ ./util/scripts/config --enable NEED_IFWI +[coreboot]$ ./util/scripts/config --enable HAVE_IFD_BIN +[coreboot]$ ./util/scripts/config --set-str IFWI_FILE_NAME "<flashregion_1_bios.bin>" +[coreboot]$ ./util/scripts/config --set-str IFD_BIN_PATH "<flashregion_0_flashdescriptor.bin>" +[coreboot]$ make olddefconfig +``` + +### Building +```bash +[coreboot]$ make +``` + +Now you should have a working and ready to use coreboot build at `build/coreboot.rom`. + +### Flashing +```bash +[coreboot]$ flashrom -p <your_programmer> -w build/coreboot.rom +``` + ## Board status ### Working - bootblock, romstage, ramstage @@ -78,22 +157,13 @@ - mini PCIe - flashing with flashrom internally using Linux -## Building and flashing coreboot -### Building - -```bash -make distclean -touch .config -./util/scripts/config --enable VENDOR_UP -./util/scripts/config --enable BOARD_UP_SQUARED -./util/scripts/config --enable NEED_IFWI -./util/scripts/config --enable HAVE_IFD_BIN -./util/scripts/config --set-str IFWI_FILE_NAME "<path_to_your_bios_region>" -./util/scripts/config --set-str IFD_BIN_PATH "<path_to_your_ifd_region>" -make olddefconfig -``` - -### Flashing +[header_cn16]: header_cn16_10pin_uart0.svg +[header_cn16_link]: #uart0-cn16 +[header_cn22]: header_cn22_12pin_spi.svg +[header_cn22_link]: #using-the-spi-header +[header_gpio]: header_40pin_gpio_uart1.svg +[header_gpio_link]: #uart1-gpio-header [overview_top]: top.jpg [overview_bottom]: bottom.jpg +[overview_bottom_link]: #bottom diff --git a/Documentation/soc/intel/apollolake/flash_layout.dia b/Documentation/soc/intel/apollolake/flash_layout.dia Binary files differnew file mode 100644 index 0000000000..4ea5440619 --- /dev/null +++ b/Documentation/soc/intel/apollolake/flash_layout.dia diff --git a/Documentation/soc/intel/apollolake/flash_layout.svg b/Documentation/soc/intel/apollolake/flash_layout.svg new file mode 100644 index 0000000000..9322875d90 --- /dev/null +++ b/Documentation/soc/intel/apollolake/flash_layout.svg @@ -0,0 +1,122 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.0//EN" "http://www.w3.org/TR/2001/PR-SVG-20010719/DTD/svg10.dtd"> +<svg width="38cm" height="18cm" viewBox="118 98 744 344" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink"> + <g> + <rect style="fill: #ffffff" x="620" y="100" width="180" height="60"/> + <rect style="fill: none; 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fill-opacity:0; stroke-width: 2; stroke: #000000" d="M 120 380 C 120,320 240,360 240,311"/> + <polygon style="fill: #000000" points="245,311 240,301 235,311 "/> + <polygon style="fill: none; fill-opacity:0; stroke-width: 2; stroke: #000000" points="245,311 240,301 235,311 "/> + </g> +</svg> diff --git a/Documentation/soc/intel/apollolake/index.md b/Documentation/soc/intel/apollolake/index.md new file mode 100644 index 0000000000..d4a5ee51ae --- /dev/null +++ b/Documentation/soc/intel/apollolake/index.md @@ -0,0 +1,17 @@ +# Apollolake +## SPI flash layout + +![][apl_flash_layout] + +With Apollolake Intel invented another flash layout for x86 firmware called IFWI (Intel FirmWare Image). + +Usually on x86 platforms the bootblock is stored at the end of the bios region +and the Intel ME / TXE has its own IFD region. On Apollolake both have been +moved into the IFWI region, which is a subregion of "BIOS", since it allows to +store multiple firmware components. + +The IFWI region can be manipulated by `ifwitool`. + +[apl_flash_layout]: flash_layout.svg + + diff --git a/Documentation/soc/intel/index.md b/Documentation/soc/intel/index.md index 86f4de7155..f30ff9a1d6 100644 --- a/Documentation/soc/intel/index.md +++ b/Documentation/soc/intel/index.md @@ -9,3 +9,4 @@ This section contains documentation about coreboot on specific Intel SOCs. - [Ice Lake/9th Gen Core-i series](icelake/index.md) - [MP Initialization](mp_init/mp_init.md) - [Firmware Interface Table](fit.md) +- [Apollolake](apollolake/index.md) |
