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-rw-r--r--src/mainboard/intel/adlrvp/devicetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index 8926887c33..2c45e85e34 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -83,6 +83,12 @@ chip soc/intel/alderlake
.clk_src = 0,
}"
+ # Enable CPU PCIE RP 2 using CLK 3
+ register "cpu_pcie_rp[CPU_RP(2)]" = "{
+ .clk_req = 3,
+ .clk_src = 3,
+ }"
+
# Enable CPU PCIE RP 3 using CLK 4
register "cpu_pcie_rp[CPU_RP(3)]" = "{
.clk_req = 4,