diff options
-rw-r--r-- | Makefile.inc | 4 | ||||
-rw-r--r-- | src/cpu/intel/fit/Makefile.inc | 4 | ||||
-rw-r--r-- | src/security/intel/cbnt/Makefile.inc | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/Makefile.inc b/Makefile.inc index 96374a94a7..b1c706709a 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1090,7 +1090,7 @@ TS_OPTIONS := -j $(CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE) endif ifneq ($(CONFIG_UPDATE_IMAGE),y) -$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $(IFITTOOL) $$(cpu_ucode_cbfs_file) $(obj)/fmap.fmap $(obj)/fmap.desc +$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $(obj)/fmap.fmap $(obj)/fmap.desc $(CBFSTOOL) $@.tmp create -M $(obj)/fmap.fmap -r $(shell cat $(obj)/fmap.desc) ifeq ($(CONFIG_ARCH_X86),y) $(CBFSTOOL) $@.tmp add \ @@ -1146,7 +1146,7 @@ add_intermediate = \ $(1): $(obj)/coreboot.pre $(2) | $(INTERMEDIATE) \ $(eval INTERMEDIATE+=$(1)) $(eval PHONY+=$(1)) -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(CBFSTOOL) $$(INTERMEDIATE) +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(CBFSTOOL) $(IFITTOOL) $$(INTERMEDIATE) @printf " CBFS $(subst $(obj)/,,$(@))\n" # The full ROM may be larger than the CBFS part, so create an empty # file (filled with \377 = 0xff) and copy the CBFS image over it. diff --git a/src/cpu/intel/fit/Makefile.inc b/src/cpu/intel/fit/Makefile.inc index b4926ba2ff..aac2fe6aa0 100644 --- a/src/cpu/intel/fit/Makefile.inc +++ b/src/cpu/intel/fit/Makefile.inc @@ -21,7 +21,7 @@ ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y) -$(call add_intermediate, add_mcu_fit, set_fit_ptr) +$(call add_intermediate, add_mcu_fit, set_fit_ptr $(IFITTOOL)) @printf " UPDATE-FIT Microcode\n" $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT @@ -32,7 +32,7 @@ $(call add_intermediate, set_ts_fit_ptr, $(IFITTOOL)) @printf " UPDATE-FIT Top Swap: set FIT pointer to table\n" $(IFITTOOL) -f $< -F -n intel_fit_ts -r COREBOOT $(TS_OPTIONS) -$(call add_intermediate, add_ts_mcu_fit, set_ts_fit_ptr) +$(call add_intermediate, add_ts_mcu_fit, set_ts_fit_ptr $(IFITTOOL)) @printf " UPDATE-FIT Top Swap: Microcode\n" ifneq ($(FIT_ENTRY),) $(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT diff --git a/src/security/intel/cbnt/Makefile.inc b/src/security/intel/cbnt/Makefile.inc index cc18b203d6..a520696118 100644 --- a/src/security/intel/cbnt/Makefile.inc +++ b/src/security/intel/cbnt/Makefile.inc @@ -86,7 +86,7 @@ $(obj)/bpm.bin: $(obj)/bpm_unsigned.bin $(CBNT_PROV) $(call strip_quotes, $(CONF $(CBNT_PROV) bpm-sign $< $@ $(CONFIG_INTEL_CBNT_BPM_PRIV_KEY_FILE) "" # Add BPM at the end of the build when all files have been added -files_added:: $(obj)/bpm.bin +files_added:: $(obj)/bpm.bin $(IFITTOOL) printf " CBNT Adding BPM\n" $(CBFSTOOL) $(obj)/coreboot.rom add -f $< -n boot_policy_manifest.bin -a 0x10 -t raw printf " IFITTOOL Adding BPM\n" |