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-rw-r--r--Makefile.inc14
-rw-r--r--src/Kconfig8
-rw-r--r--src/soc/intel/apollolake/Kconfig1
-rw-r--r--src/vendorcode/google/chromeos/vboot2/Makefile.inc10
4 files changed, 28 insertions, 5 deletions
diff --git a/Makefile.inc b/Makefile.inc
index dc8fa86195..8e6977d214 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -798,13 +798,21 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
#
# Make sure that segment for .car.data is ignored while adding romstage.
$(CONFIG_CBFS_PREFIX)/romstage-align := 64
-$(CONFIG_CBFS_PREFIX)/romstage-options := --xip -S .car.data
+$(CONFIG_CBFS_PREFIX)/romstage-options := -S ".car.data"
+
+# If CAR does not support execution of code, romstage on x86 is expected to be
+# xip.
+ifneq ($(CONFIG_NO_XIP_EARLY_STAGES),y)
+$(CONFIG_CBFS_PREFIX)/romstage-options += --xip
+
# If XIP_ROM_SIZE isn't being used don't overly constrain romstage by passing
# -P with a default value.
ifneq ($(CONFIG_NO_FIXED_XIP_ROM_SIZE),y)
$(CONFIG_CBFS_PREFIX)/romstage-options += -P $(CONFIG_XIP_ROM_SIZE)
-endif
-endif
+endif # CONFIG_NO_FIXED_XIP_ROM_SIZE
+
+endif # CONFIG_NO_XIP_EARLY_STAGES
+endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64
cbfs-files-y += $(CONFIG_CBFS_PREFIX)/ramstage
$(CONFIG_CBFS_PREFIX)/ramstage-file := $(objcbfs)/ramstage.elf
diff --git a/src/Kconfig b/src/Kconfig
index f9bd661e05..b56f01070f 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -199,6 +199,14 @@ config INCLUDE_CONFIG_FILE
config 0x8d740 raw 3324
(empty) 0x8e480 null 3610440
+config NO_XIP_EARLY_STAGES
+ bool
+ default n if ARCH_X86
+ default y
+ help
+ Identify if --xip parameter needs to be passed into cbfstool for early
+ stages.
+
config EARLY_CBMEM_INIT
def_bool !LATE_CBMEM_INIT
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index d52d592d07..d6d4d1f86d 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -24,6 +24,7 @@ config CPU_SPECIFIC_OPTIONS
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select NO_FIXED_XIP_ROM_SIZE
+ select NO_XIP_EARLY_STAGES
select PARALLEL_MP
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
diff --git a/src/vendorcode/google/chromeos/vboot2/Makefile.inc b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
index f9348842a2..b0a3c125ab 100644
--- a/src/vendorcode/google/chromeos/vboot2/Makefile.inc
+++ b/src/vendorcode/google/chromeos/vboot2/Makefile.inc
@@ -76,9 +76,15 @@ cbfs-files-$(CONFIG_SEPARATE_VERSTAGE) += $(CONFIG_CBFS_PREFIX)/verstage
$(CONFIG_CBFS_PREFIX)/verstage-file := $(objcbfs)/verstage.elf
$(CONFIG_CBFS_PREFIX)/verstage-type := stage
$(CONFIG_CBFS_PREFIX)/verstage-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
-# Verstage on x86 expected to be xip.
+
ifeq ($(CONFIG_ARCH_VERSTAGE_X86_32)$(CONFIG_ARCH_VERSTAGE_X86_64),y)
-$(CONFIG_CBFS_PREFIX)/verstage-options := -a 64 --xip -S ".car.data"
+$(CONFIG_CBFS_PREFIX)/verstage-options := -a 64 -S ".car.data"
+
+# If CAR does not support execution of code, verstage on x86 is expected to be
+# xip.
+ifneq ($(CONFIG_NO_XIP_EARLY_STAGES),y)
+$(CONFIG_CBFS_PREFIX)/verstage-options += --xip
+endif
endif