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-rw-r--r--src/soc/intel/common/Kconfig3
-rw-r--r--src/soc/intel/common/basecode/Kconfig12
-rw-r--r--src/soc/intel/common/basecode/Makefile.inc7
3 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 3613965fbf..ea6f10e1f6 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -11,6 +11,9 @@ source "src/soc/intel/common/block/Kconfig"
comment "Intel SoC Common PCH Code"
source "src/soc/intel/common/pch/Kconfig"
+comment "Intel SoC Common coreboot stages"
+source "src/soc/intel/common/basecode/Kconfig"
+
config DISPLAY_MTRRS
bool "MTRRs: Display the MTRR settings"
default n
diff --git a/src/soc/intel/common/basecode/Kconfig b/src/soc/intel/common/basecode/Kconfig
new file mode 100644
index 0000000000..68aea15671
--- /dev/null
+++ b/src/soc/intel/common/basecode/Kconfig
@@ -0,0 +1,12 @@
+config SOC_INTEL_COMMON_BASECODE
+ bool
+ help
+ Common coreboot stages for Intel platform
+
+if SOC_INTEL_COMMON_BASECODE
+
+comment "Intel platform Common coreboot stage files"
+source "src/soc/intel/common/basecode/*/Kconfig"
+source "src/soc/intel/common/basecode/*/*/Kconfig"
+
+endif
diff --git a/src/soc/intel/common/basecode/Makefile.inc b/src/soc/intel/common/basecode/Makefile.inc
new file mode 100644
index 0000000000..7fdd0e544b
--- /dev/null
+++ b/src/soc/intel/common/basecode/Makefile.inc
@@ -0,0 +1,7 @@
+ifeq ($(CONFIG_SOC_INTEL_COMMON_BASECODE),y)
+
+subdirs-y += ./*
+
+CPPFLAGS_common += -I$(src)/soc/intel/common/basecode/include/
+
+endif