diff options
| -rw-r--r-- | src/soc/intel/alderlake/Kconfig | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 01d5f89b4a..508606961a 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -517,7 +517,7 @@ config INTEL_GMA_BCLM_WIDTH config FSP_PUBLISH_MBP_HOB bool - default n if CHROMEOS && (SOC_INTEL_RAPTORLAKE || SOC_INTEL_ALDERLAKE_PCH_N) + default n if CHROMEOS && (SOC_INTEL_ALDERLAKE_PCH_N) default y help This is to control creation of ME_BIOS_PAYLOAD_HOB (MBP HOB) by FSP. @@ -526,8 +526,7 @@ config FSP_PUBLISH_MBP_HOB Note: It cannot be disabled for ADL-P based platforms because ADL-P FSP relies on MBP HOB for ChipsetInit version for ChipsetInit sync. As ChipsetInit sync doesn't occur if no MBP HOB, so it results S0ix issue. This limitation is addressed in the - later platforms so creation of MBP HOB can be skipped for ADL-N and RPL based - platforms. + later platforms so creation of MBP HOB can be skipped for ADL-N based platforms. config INCLUDE_HSPHY_IN_FMAP bool "Include PCIe 5.0 HSPHY firmware in flash" |