diff options
| -rw-r--r-- | src/southbridge/intel/i82801dx/i82801dx.h | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/i82801ix.h | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/i82801jx.h | 4 |
3 files changed, 0 insertions, 10 deletions
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h index 99f3af3305..4eb7357987 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.h +++ b/src/southbridge/intel/i82801dx/i82801dx.h @@ -10,8 +10,6 @@ void i82801dx_enable(struct device *dev); void i82801dx_early_init(void); void i82801dx_lpc_setup(void); -#define DEBUG_PERIODIC_SMIS 0 - #define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index f0b60f6215..68b268ba43 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -20,8 +20,6 @@ #define DEFAULT_TCOBASE (DEFAULT_PMBASE + 0x60) #define DEFAULT_GPIOBASE 0x00000580 -#define APM_CNT 0xb2 - #define GP_IO_USE_SEL 0x00 #define GP_IO_SEL 0x04 #define GP_LVL 0x0c @@ -31,8 +29,6 @@ #define GP_IO_SEL2 0x34 #define GP_LVL2 0x38 -#define DEBUG_PERIODIC_SMIS 0 - #define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h index 33386f5aad..dc1130b379 100644 --- a/src/southbridge/intel/i82801jx/i82801jx.h +++ b/src/southbridge/intel/i82801jx/i82801jx.h @@ -11,8 +11,6 @@ #define DEFAULT_TCOBASE (DEFAULT_PMBASE + 0x60) #define DEFAULT_GPIOBASE 0x00000580 -#define APM_CNT 0xb2 - #define GP_IO_USE_SEL 0x00 #define GP_IO_SEL 0x04 #define GP_LVL 0x0c @@ -22,8 +20,6 @@ #define GP_IO_SEL2 0x34 #define GP_LVL2 0x38 -#define DEBUG_PERIODIC_SMIS 0 - #define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 |