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-rw-r--r--src/mainboard/amd/serengeti_cheetah/get_bus_conf.c255
-rw-r--r--src/mainboard/asus/m2n-e/get_bus_conf.c2
-rw-r--r--src/mainboard/broadcom/blast/get_bus_conf.c93
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c89
-rw-r--r--src/mainboard/gigabyte/m57sli/get_bus_conf.c88
-rw-r--r--src/mainboard/iwill/dk8_htx/get_bus_conf.c257
-rw-r--r--src/mainboard/msi/ms9185/get_bus_conf.c139
-rw-r--r--src/mainboard/msi/ms9282/get_bus_conf.c104
-rw-r--r--src/mainboard/sunw/ultra40/get_bus_conf.c382
-rw-r--r--src/mainboard/supermicro/h8dme/get_bus_conf.c119
-rw-r--r--src/mainboard/supermicro/h8dmr/get_bus_conf.c119
-rw-r--r--src/mainboard/tyan/s2881/get_bus_conf.c102
-rw-r--r--src/mainboard/tyan/s2885/get_bus_conf.c114
-rw-r--r--src/mainboard/tyan/s2891/get_bus_conf.c212
-rw-r--r--src/mainboard/tyan/s2892/get_bus_conf.c196
-rw-r--r--src/mainboard/tyan/s2895/get_bus_conf.c216
16 files changed, 1269 insertions, 1218 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c b/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c
index d4f44c0d93..f5cd846183 100644
--- a/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c
+++ b/src/mainboard/amd/serengeti_cheetah/get_bus_conf.c
@@ -15,11 +15,10 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
struct mb_sysconf_t mb_sysconf;
-static unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
+static unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -27,8 +26,8 @@ static unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-static unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+static unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
0x20202020,
// 0x20202020,
@@ -39,39 +38,37 @@ static unsigned hcdnx[] =
// 0x20202020,
};
-
-
static unsigned get_bus_conf_done = 0;
static unsigned get_hcid(unsigned i)
{
- unsigned id = 0;
+ unsigned id = 0;
- unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
+ unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
- unsigned devn = sysconf.hcdn[i] & 0xff;
+ unsigned devn = sysconf.hcdn[i] & 0xff;
- device_t dev;
+ device_t dev;
- dev = dev_find_slot(busn, PCI_DEVFN(devn,0));
+ dev = dev_find_slot(busn, PCI_DEVFN(devn, 0));
- switch (dev->device) {
- case 0x7458: //8132
- id = 1;
- break;
- case 0x7454: //8151
- id = 2;
+ switch (dev->device) {
+ case 0x7458: //8132
+ id = 1;
+ break;
+ case 0x7454: //8151
+ id = 2;
break;
- case 0x7450: //8131
- id = 3;
- break;
- }
+ case 0x7450: //8131
+ id = 3;
+ break;
+ }
- // we may need more way to find out hcid: subsystem id? GPIO read ?
+ // we may need more way to find out hcid: subsystem id? GPIO read ?
- // we need use id for 1. bus num, 2. mptable, 3. acpi table
+ // we need use id for 1. bus num, 2. mptable, 3. acpi table
- return id;
+ return id;
}
void get_bus_conf(void)
@@ -79,11 +76,12 @@ void get_bus_conf(void)
unsigned apicid_base;
- device_t dev;
+ device_t dev;
int i, j;
struct mb_sysconf_t *m;
- if(get_bus_conf_done == 1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
get_bus_conf_done = 1;
@@ -92,7 +90,7 @@ void get_bus_conf(void)
m = sysconf.mb;
sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
sysconf.pci1234[i] = pci1234x[i];
sysconf.hcdn[i] = hcdnx[i];
}
@@ -105,91 +103,106 @@ void get_bus_conf(void)
m->bus_8132_0 = (sysconf.pci1234[0] >> 16) & 0xff;
m->bus_8111_0 = m->bus_8132_0;
- /* 8111 */
- dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
- if (dev) {
- m->bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8111_0, sysconf.sbdn);
- }
-
- /* 8132-1 */
- dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3,0));
- if (dev) {
- m->bus_8132_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132_0, m->sbdn3);
- }
-
- /* 8132-2 */
- dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1,0));
- if (dev) {
- m->bus_8132_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132_0, m->sbdn3+1);
- }
-
- /* HT chain 1 */
- j=0;
- for(i=1; i< sysconf.hc_possible_num; i++) {
- if(!(sysconf.pci1234[i] & 0x1) ) continue;
-
- // check hcid type here
- sysconf.hcid[i] = get_hcid(i);
-
- switch(sysconf.hcid[i]) {
-
- case 1: //8132
- case 3: //8131
-
- m->bus_8132a[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
-
- m->sbdn3a[j] = sysconf.hcdn[i] & 0xff;
-
- /* 8132-1 */
- dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j],0));
- if (dev) {
- m->bus_8132a[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]);
- }
-
- /* 8132-2 */
- dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1,0));
- if (dev) {
- m->bus_8132a[j][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]+1);
- }
-
- break;
-
- case 2: //8151
-
- m->bus_8151[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
- m->sbdn5[j] = sysconf.hcdn[i] & 0xff;
- /* 8151 */
- dev = dev_find_slot(m->bus_8151[j][0], PCI_DEVFN(m->sbdn5[j]+1, 0));
-
- if (dev) {
- m->bus_8151[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- // printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151[j][1]);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8151[j][0], m->sbdn5[j]+1);
- }
-
- break;
- }
-
- j++;
- }
+ /* 8111 */
+ dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn, 0));
+ if (dev) {
+ m->bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8111_0, sysconf.sbdn);
+ }
+ /* 8132-1 */
+ dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3, 0));
+ if (dev) {
+ m->bus_8132_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8132_0, m->sbdn3);
+ }
+
+ /* 8132-2 */
+ dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3 + 1, 0));
+ if (dev) {
+ m->bus_8132_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8132_0, m->sbdn3 + 1);
+ }
+
+ /* HT chain 1 */
+ j = 0;
+ for (i = 1; i < sysconf.hc_possible_num; i++) {
+ if (!(sysconf.pci1234[i] & 0x1))
+ continue;
+
+ // check hcid type here
+ sysconf.hcid[i] = get_hcid(i);
+
+ switch (sysconf.hcid[i]) {
+
+ case 1: //8132
+ case 3: //8131
+
+ m->bus_8132a[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
+
+ m->sbdn3a[j] = sysconf.hcdn[i] & 0xff;
+
+ /* 8132-1 */
+ dev =
+ dev_find_slot(m->bus_8132a[j][0],
+ PCI_DEVFN(m->sbdn3a[j], 0));
+ if (dev) {
+ m->bus_8132a[j][1] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8132a[j][0], m->sbdn3a[j]);
+ }
+
+ /* 8132-2 */
+ dev =
+ dev_find_slot(m->bus_8132a[j][0],
+ PCI_DEVFN(m->sbdn3a[j] + 1, 0));
+ if (dev) {
+ m->bus_8132a[j][2] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8132a[j][0], m->sbdn3a[j] + 1);
+ }
+
+ break;
+
+ case 2: //8151
+
+ m->bus_8151[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
+ m->sbdn5[j] = sysconf.hcdn[i] & 0xff;
+ /* 8151 */
+ dev =
+ dev_find_slot(m->bus_8151[j][0],
+ PCI_DEVFN(m->sbdn5[j] + 1, 0));
+
+ if (dev) {
+ m->bus_8151[j][1] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ // printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151[j][1]);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8151[j][0], m->sbdn5[j] + 1);
+ }
+
+ break;
+ }
+
+ j++;
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -197,12 +210,12 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- m->apicid_8111 = apicid_base+0;
- m->apicid_8132_1 = apicid_base+1;
- m->apicid_8132_2 = apicid_base+2;
- for(i=0;i<j;i++) {
- m->apicid_8132a[i][0] = apicid_base + 3 + i*2;
- m->apicid_8132a[i][1] = apicid_base + 3 + i*2 + 1;
- }
+ m->apicid_8111 = apicid_base + 0;
+ m->apicid_8132_1 = apicid_base + 1;
+ m->apicid_8132_2 = apicid_base + 2;
+ for (i = 0; i < j; i++) {
+ m->apicid_8132a[i][0] = apicid_base + 3 + i * 2;
+ m->apicid_8132a[i][1] = apicid_base + 3 + i * 2 + 1;
+ }
}
diff --git a/src/mainboard/asus/m2n-e/get_bus_conf.c b/src/mainboard/asus/m2n-e/get_bus_conf.c
index 18de8ecae3..fd7d30476b 100644
--- a/src/mainboard/asus/m2n-e/get_bus_conf.c
+++ b/src/mainboard/asus/m2n-e/get_bus_conf.c
@@ -85,7 +85,7 @@ void get_bus_conf(void)
get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); /* First byte of first chain */
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); /* First byte of first chain */
sbdn = sysconf.sbdn;
for (i = 0; i < 8; i++)
diff --git a/src/mainboard/broadcom/blast/get_bus_conf.c b/src/mainboard/broadcom/blast/get_bus_conf.c
index 36959a4a7b..5de8952dc2 100644
--- a/src/mainboard/broadcom/blast/get_bus_conf.c
+++ b/src/mainboard/broadcom/blast/get_bus_conf.c
@@ -10,7 +10,6 @@
#include <cpu/amd/amdk8_sysconf.h>
#include <stdlib.h>
-
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_bcm5780[7];
@@ -19,11 +18,9 @@ unsigned char bus_bcm5785_1 = 8;
unsigned char bus_bcm5785_1_1 = 9;
unsigned apicid_bcm5785[3];
-
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -32,9 +29,9 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
- 0x20202020,
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -43,9 +40,8 @@ unsigned hcdnx[] =
// 0x20202020,
// 0x20202020,
};
-unsigned sbdn2;
-
+unsigned sbdn2;
static unsigned get_bus_conf_done = 0;
@@ -54,51 +50,56 @@ void get_bus_conf(void)
unsigned apicid_base;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
- sbdn2 = sysconf.hcdn[0] & 0xff; // bcm5780
+ sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
+ sbdn2 = sysconf.hcdn[0] & 0xff; // bcm5780
bus_bcm5785_0 = (sysconf.pci1234[0] >> 16) & 0xff;
bus_bcm5780[0] = bus_bcm5785_0;
- /* bcm5785 */
- dev = dev_find_slot(bus_bcm5785_0, PCI_DEVFN(sysconf.sbdn,0));
- if (dev) {
- bus_bcm5785_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- dev = dev_find_slot(bus_bcm5785_1, PCI_DEVFN(0x0d,0));
- if(dev) {
- bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:07.0, using defaults\n", bus_bcm5785_0);
- }
-
- /* bcm5780 */
- for(i = 1; i < 7; i++) {
- dev = dev_find_slot(bus_bcm5780[0], PCI_DEVFN(sbdn2 + i - 1,0));
- if(dev) {
- bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ /* bcm5785 */
+ dev = dev_find_slot(bus_bcm5785_0, PCI_DEVFN(sysconf.sbdn, 0));
+ if (dev) {
+ bus_bcm5785_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ dev = dev_find_slot(bus_bcm5785_1, PCI_DEVFN(0x0d, 0));
+ if (dev) {
+ bus_bcm5785_1_1 =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
}
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_bcm5780[i]);
- }
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:07.0, using defaults\n",
+ bus_bcm5785_0);
}
+ /* bcm5780 */
+ for (i = 1; i < 7; i++) {
+ dev =
+ dev_find_slot(bus_bcm5780[0], PCI_DEVFN(sbdn2 + i - 1, 0));
+ if (dev) {
+ bus_bcm5780[i] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_bcm5780[i]);
+ }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -106,6 +107,6 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- for(i=0;i<3;i++)
- apicid_bcm5785[i] = apicid_base+i;
+ for (i = 0; i < 3; i++)
+ apicid_bcm5785[i] = apicid_base + i;
}
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c b/src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c
index d2de5ca7f0..9315cbd9ae 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/get_bus_conf.c
@@ -33,17 +33,14 @@
#include <cpu/amd/amdk8_sysconf.h>
#include <stdlib.h>
-
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_sis966[8]; //1
- unsigned apicid_sis966;
-
+unsigned char bus_sis966[8]; //1
+unsigned apicid_sis966;
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -52,10 +49,10 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
-// 0x20202020,
+// 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -72,51 +69,55 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
- for(i=0; i<8; i++) {
+ for (i = 0; i < 8; i++) {
bus_sis966[i] = 0;
}
bus_sis966[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- /* SIS966 */
- dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn + 0x06,0));
- if (dev) {
- bus_sis966[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_sis966[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_sis966[2]++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
-
- bus_sis966[1] = 2;
- bus_sis966[2] = 3;
- }
-
- for(i=2; i<8;i++) {
- dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
- if (dev) {
- bus_sis966[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- }
+ /* SIS966 */
+ dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn + 0x06, 0));
+ if (dev) {
+ bus_sis966[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_sis966[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_sis966[2]++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x06);
+
+ bus_sis966[1] = 2;
+ bus_sis966[2] = 3;
+ }
+ for (i = 2; i < 8; i++) {
+ dev =
+ dev_find_slot(bus_sis966[0],
+ PCI_DEVFN(sbdn + 0x0a + i - 2, 0));
+ if (dev) {
+ bus_sis966[i] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -124,6 +125,6 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_sis966 = apicid_base+0;
+ apicid_sis966 = apicid_base + 0;
}
diff --git a/src/mainboard/gigabyte/m57sli/get_bus_conf.c b/src/mainboard/gigabyte/m57sli/get_bus_conf.c
index 80822556fe..c798415579 100644
--- a/src/mainboard/gigabyte/m57sli/get_bus_conf.c
+++ b/src/mainboard/gigabyte/m57sli/get_bus_conf.c
@@ -31,17 +31,14 @@
#include <cpu/amd/amdk8_sysconf.h>
#include <stdlib.h>
-
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_mcp55[8]; //1
- unsigned apicid_mcp55;
-
+unsigned char bus_mcp55[8]; //1
+unsigned apicid_mcp55;
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -50,10 +47,10 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
-// 0x20202020,
+// 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -70,51 +67,54 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
- for(i=0; i<8; i++) {
+ for (i = 0; i < 8; i++) {
bus_mcp55[i] = 0;
}
bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- /* MCP55 */
- dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06,0));
- if (dev) {
- bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_mcp55[2]++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
-
- bus_mcp55[1] = 2;
- bus_mcp55[2] = 3;
- }
-
- for(i=2; i<8;i++) {
- dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
- if (dev) {
- bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- }
+ /* MCP55 */
+ dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06, 0));
+ if (dev) {
+ bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_mcp55[2]++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x06);
+
+ bus_mcp55[1] = 2;
+ bus_mcp55[2] = 3;
+ }
+ for (i = 2; i < 8; i++) {
+ dev =
+ dev_find_slot(bus_mcp55[0],
+ PCI_DEVFN(sbdn + 0x0a + i - 2, 0));
+ if (dev) {
+ bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -122,6 +122,6 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_mcp55 = apicid_base+0;
+ apicid_mcp55 = apicid_base + 0;
}
diff --git a/src/mainboard/iwill/dk8_htx/get_bus_conf.c b/src/mainboard/iwill/dk8_htx/get_bus_conf.c
index 4f63ff592f..8868f462d7 100644
--- a/src/mainboard/iwill/dk8_htx/get_bus_conf.c
+++ b/src/mainboard/iwill/dk8_htx/get_bus_conf.c
@@ -15,23 +15,22 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
struct mb_sysconf_t mb_sysconf;
-static unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0, // SB chain m
- 0x0000000, // HTX
- 0x0000100, // co processor on socket 1
+static unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0, // SB chain m
+ 0x0000000, // HTX
+ 0x0000100, // co processor on socket 1
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0
};
-static unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+static unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
0x20202020,
0x20202020,
- 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -39,39 +38,37 @@ static unsigned hcdnx[] =
// 0x20202020,
};
-
-
static unsigned get_bus_conf_done = 0;
static unsigned get_hcid(unsigned i)
{
- unsigned id = 0;
+ unsigned id = 0;
- unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
+ unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
- unsigned devn = sysconf.hcdn[i] & 0xff;
+ unsigned devn = sysconf.hcdn[i] & 0xff;
- device_t dev;
+ device_t dev;
- dev = dev_find_slot(busn, PCI_DEVFN(devn,0));
+ dev = dev_find_slot(busn, PCI_DEVFN(devn, 0));
- switch (dev->device) {
- case 0x7458: //8132
- id = 1;
- break;
- case 0x7454: //8151
- id = 2;
+ switch (dev->device) {
+ case 0x7458: //8132
+ id = 1;
break;
- case 0x7450: //8131
- id = 3;
- break;
- }
+ case 0x7454: //8151
+ id = 2;
+ break;
+ case 0x7450: //8131
+ id = 3;
+ break;
+ }
- // we may need more way to find out hcid: subsystem id? GPIO read ?
+ // we may need more way to find out hcid: subsystem id? GPIO read ?
- // we need use id for 1. bus num, 2. mptable, 3. acpi table
+ // we need use id for 1. bus num, 2. mptable, 3. acpi table
- return id;
+ return id;
}
void get_bus_conf(void)
@@ -79,11 +76,12 @@ void get_bus_conf(void)
unsigned apicid_base;
- device_t dev;
+ device_t dev;
int i, j;
struct mb_sysconf_t *m;
- if(get_bus_conf_done == 1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
get_bus_conf_done = 1;
@@ -92,7 +90,7 @@ void get_bus_conf(void)
m = sysconf.mb;
sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
sysconf.pci1234[i] = pci1234x[i];
sysconf.hcdn[i] = hcdnx[i];
}
@@ -105,90 +103,105 @@ void get_bus_conf(void)
m->bus_8132_0 = (sysconf.pci1234[0] >> 16) & 0xff;
m->bus_8111_0 = m->bus_8132_0;
- /* 8111 */
- dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
- if (dev) {
- m->bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8111_0, sysconf.sbdn);
- }
-
- /* 8132-1 */
- dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3,0));
- if (dev) {
- m->bus_8132_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132_0, m->sbdn3);
- }
-
- /* 8132-2 */
- dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1,0));
- if (dev) {
- m->bus_8132_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132_0, m->sbdn3+1);
- }
-
- /* HT chain 1 */
- j=0;
- for(i=1; i< sysconf.hc_possible_num; i++) {
- if(!(sysconf.pci1234[i] & 0x1) ) continue;
-
- // check hcid type here
- sysconf.hcid[i] = get_hcid(i);
-
- switch(sysconf.hcid[i]) {
-
- case 1: //8132
- case 3: //8131
-
- m->bus_8132a[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
-
- m->sbdn3a[j] = sysconf.hcdn[i] & 0xff;
-
- /* 8132-1 */
- dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j],0));
- if (dev) {
- m->bus_8132a[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]);
- }
-
- /* 8132-2 */
- dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1,0));
- if (dev) {
- m->bus_8132a[j][2] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8132a[j][0], m->sbdn3a[j]+1);
- }
-
- break;
-
- case 2: //8151
-
- m->bus_8151[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
- m->sbdn5[j] = sysconf.hcdn[i] & 0xff;
- /* 8151 */
- dev = dev_find_slot(m->bus_8151[j][0], PCI_DEVFN(m->sbdn5[j]+1, 0));
-
- if (dev) {
- m->bus_8151[j][1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_8151[j][0], m->sbdn5[j]+1);
- }
-
- break;
- }
-
- j++;
- }
+ /* 8111 */
+ dev = dev_find_slot(m->bus_8111_0, PCI_DEVFN(sysconf.sbdn, 0));
+ if (dev) {
+ m->bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8111_0, sysconf.sbdn);
+ }
+
+ /* 8132-1 */
+ dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3, 0));
+ if (dev) {
+ m->bus_8132_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8132_0, m->sbdn3);
+ }
+ /* 8132-2 */
+ dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3 + 1, 0));
+ if (dev) {
+ m->bus_8132_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8132_0, m->sbdn3 + 1);
+ }
+
+ /* HT chain 1 */
+ j = 0;
+ for (i = 1; i < sysconf.hc_possible_num; i++) {
+ if (!(sysconf.pci1234[i] & 0x1))
+ continue;
+
+ // check hcid type here
+ sysconf.hcid[i] = get_hcid(i);
+
+ switch (sysconf.hcid[i]) {
+
+ case 1: //8132
+ case 3: //8131
+
+ m->bus_8132a[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
+
+ m->sbdn3a[j] = sysconf.hcdn[i] & 0xff;
+
+ /* 8132-1 */
+ dev =
+ dev_find_slot(m->bus_8132a[j][0],
+ PCI_DEVFN(m->sbdn3a[j], 0));
+ if (dev) {
+ m->bus_8132a[j][1] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8132a[j][0], m->sbdn3a[j]);
+ }
+
+ /* 8132-2 */
+ dev =
+ dev_find_slot(m->bus_8132a[j][0],
+ PCI_DEVFN(m->sbdn3a[j] + 1, 0));
+ if (dev) {
+ m->bus_8132a[j][2] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8132a[j][0], m->sbdn3a[j] + 1);
+ }
+
+ break;
+
+ case 2: //8151
+
+ m->bus_8151[j][0] = (sysconf.pci1234[i] >> 16) & 0xff;
+ m->sbdn5[j] = sysconf.hcdn[i] & 0xff;
+ /* 8151 */
+ dev =
+ dev_find_slot(m->bus_8151[j][0],
+ PCI_DEVFN(m->sbdn5[j] + 1, 0));
+
+ if (dev) {
+ m->bus_8151[j][1] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_8151[j][0], m->sbdn5[j] + 1);
+ }
+
+ break;
+ }
+
+ j++;
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -196,12 +209,12 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- m->apicid_8111 = apicid_base+0;
- m->apicid_8132_1 = apicid_base+1;
- m->apicid_8132_2 = apicid_base+2;
- for(i=0;i<j;i++) {
- m->apicid_8132a[i][0] = apicid_base + 3 + i*2;
- m->apicid_8132a[i][1] = apicid_base + 3 + i*2 + 1;
- }
+ m->apicid_8111 = apicid_base + 0;
+ m->apicid_8132_1 = apicid_base + 1;
+ m->apicid_8132_2 = apicid_base + 2;
+ for (i = 0; i < j; i++) {
+ m->apicid_8132a[i][0] = apicid_base + 3 + i * 2;
+ m->apicid_8132a[i][1] = apicid_base + 3 + i * 2 + 1;
+ }
}
diff --git a/src/mainboard/msi/ms9185/get_bus_conf.c b/src/mainboard/msi/ms9185/get_bus_conf.c
index 7ed8600385..3a70d838dc 100644
--- a/src/mainboard/msi/ms9185/get_bus_conf.c
+++ b/src/mainboard/msi/ms9185/get_bus_conf.c
@@ -38,11 +38,10 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
struct mb_sysconf_t mb_sysconf;
-static unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
+static unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -50,10 +49,10 @@ static unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-static unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
- 0x20202020,
- 0x20202020,
+
+static unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
+ 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -62,73 +61,77 @@ static unsigned hcdnx[] =
// 0x20202020,
};
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
{
- unsigned apicid_base;
-
- device_t dev;
- int i;
- struct mb_sysconf_t *m;
-
- if(get_bus_conf_done==1) return; //do it only once
-
- get_bus_conf_done = 1;
-
- sysconf.mb = &mb_sysconf;
-
- m = sysconf.mb;
-
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
-
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
-
- get_sblk_pci1234();
-
- sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
- m->sbdn2 = sysconf.hcdn[0] & 0xff; // bcm5780
-
- m->bus_bcm5785_0 = (sysconf.pci1234[0] >> 16) & 0xff;
- m->bus_bcm5780[0] = m->bus_bcm5785_0;
-
- /* bcm5785 */
- dev = dev_find_slot(m->bus_bcm5785_0, PCI_DEVFN(sysconf.sbdn,0));
- if (dev) {
- m->bus_bcm5785_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- dev = dev_find_slot(m->bus_bcm5785_1, PCI_DEVFN(0xd,0));
- if(dev) {
- m->bus_bcm5785_1_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_bcm5785_0, sysconf.sbdn);
- }
-
- /* bcm5780 */
- for(i = 1; i < 7; i++) {
- dev = dev_find_slot(m->bus_bcm5780[0], PCI_DEVFN(m->sbdn2 + i - 1,0));
- if(dev) {
- m->bus_bcm5780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_bcm5780[0], m->sbdn2+i-1);
- }
- }
-
+ unsigned apicid_base;
+
+ device_t dev;
+ int i;
+ struct mb_sysconf_t *m;
+
+ if (get_bus_conf_done == 1)
+ return; //do it only once
+
+ get_bus_conf_done = 1;
+
+ sysconf.mb = &mb_sysconf;
+
+ m = sysconf.mb;
+
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
+
+ get_sblk_pci1234();
+
+ sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
+ m->sbdn2 = sysconf.hcdn[0] & 0xff; // bcm5780
+
+ m->bus_bcm5785_0 = (sysconf.pci1234[0] >> 16) & 0xff;
+ m->bus_bcm5780[0] = m->bus_bcm5785_0;
+
+ /* bcm5785 */
+ dev = dev_find_slot(m->bus_bcm5785_0, PCI_DEVFN(sysconf.sbdn, 0));
+ if (dev) {
+ m->bus_bcm5785_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ dev = dev_find_slot(m->bus_bcm5785_1, PCI_DEVFN(0xd, 0));
+ if (dev) {
+ m->bus_bcm5785_1_1 =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ }
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_bcm5785_0, sysconf.sbdn);
+ }
+
+ /* bcm5780 */
+ for (i = 1; i < 7; i++) {
+ dev =
+ dev_find_slot(m->bus_bcm5780[0],
+ PCI_DEVFN(m->sbdn2 + i - 1, 0));
+ if (dev) {
+ m->bus_bcm5780[i] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_bcm5780[0], m->sbdn2 + i - 1);
+ }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
- apicid_base = get_apicid_base(3);
+ apicid_base = get_apicid_base(3);
#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
+ apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- for(i=0;i<3;i++)
- m->apicid_bcm5785[i] = apicid_base+i;
+ for (i = 0; i < 3; i++)
+ m->apicid_bcm5785[i] = apicid_base + i;
}
diff --git a/src/mainboard/msi/ms9282/get_bus_conf.c b/src/mainboard/msi/ms9282/get_bus_conf.c
index 091840f69c..4ab124d5fc 100644
--- a/src/mainboard/msi/ms9282/get_bus_conf.c
+++ b/src/mainboard/msi/ms9282/get_bus_conf.c
@@ -39,23 +39,22 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
struct mb_sysconf_t mb_sysconf;
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
- 0x20202020,
- 0x20202020,
- 0x20202020,
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
+ 0x20202020,
+ 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -63,66 +62,69 @@ unsigned hcdnx[] =
// 0x20202020,
};
-
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
{
- unsigned apicid_base;
- struct mb_sysconf_t *m;
+ unsigned apicid_base;
+ struct mb_sysconf_t *m;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.mb = &mb_sysconf;
+ sysconf.mb = &mb_sysconf;
- m = sysconf.mb;
- memset(m, 0, sizeof(struct mb_sysconf_t));
+ m = sysconf.mb;
+ memset(m, 0, sizeof(struct mb_sysconf_t));
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
- m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
+ m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- /* MCP55 */
- dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06,0));
- if (dev) {
- m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sysconf.sbdn + 0x06);
- }
+ /* MCP55 */
+ dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06, 0));
+ if (dev) {
+ m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sysconf.sbdn + 0x06);
+ }
- for(i=2; i<8;i++) {
- dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2 , 0));
- if (dev) {
- m->bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2 );
- }
- }
+ for (i = 2; i < 8; i++) {
+ dev =
+ dev_find_slot(m->bus_mcp55[0],
+ PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2, 0));
+ if (dev) {
+ m->bus_mcp55[i] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2);
+ }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
- apicid_base = get_apicid_base(1);
+ apicid_base = get_apicid_base(1);
#else
- apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
+ apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- m->apicid_mcp55 = apicid_base+0;
+ m->apicid_mcp55 = apicid_base + 0;
}
diff --git a/src/mainboard/sunw/ultra40/get_bus_conf.c b/src/mainboard/sunw/ultra40/get_bus_conf.c
index af4d6f0ade..f57719a773 100644
--- a/src/mainboard/sunw/ultra40/get_bus_conf.c
+++ b/src/mainboard/sunw/ultra40/get_bus_conf.c
@@ -9,60 +9,57 @@
#include <stdlib.h>
#include <cpu/amd/amdk8_sysconf.h>
-
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_ck804_0; //1
- unsigned char bus_ck804_1; //2
- unsigned char bus_ck804_2; //3
- unsigned char bus_ck804_3; //4
- unsigned char bus_ck804_4; //5
- unsigned char bus_ck804_5; //6
- unsigned char bus_8131_0; //7
- unsigned char bus_8131_1; //8
- unsigned char bus_8131_2; //9
- unsigned char bus_ck804b_0;//a
- unsigned char bus_ck804b_1;//b
- unsigned char bus_ck804b_2;//c
- unsigned char bus_ck804b_3;//d
- unsigned char bus_ck804b_4;//e
- unsigned char bus_ck804b_5;//f
- unsigned apicid_ck804;
- unsigned apicid_8131_1;
- unsigned apicid_8131_2;
- unsigned apicid_ck804b;
+unsigned char bus_ck804_0; //1
+unsigned char bus_ck804_1; //2
+unsigned char bus_ck804_2; //3
+unsigned char bus_ck804_3; //4
+unsigned char bus_ck804_4; //5
+unsigned char bus_ck804_5; //6
+unsigned char bus_8131_0; //7
+unsigned char bus_8131_1; //8
+unsigned char bus_8131_2; //9
+unsigned char bus_ck804b_0; //a
+unsigned char bus_ck804b_1; //b
+unsigned char bus_ck804b_2; //c
+unsigned char bus_ck804b_3; //d
+unsigned char bus_ck804b_4; //e
+unsigned char bus_ck804b_5; //f
+unsigned apicid_ck804;
+unsigned apicid_8131_1;
+unsigned apicid_8131_2;
+unsigned apicid_ck804b;
unsigned sblk;
-unsigned pci1234[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
- 0x0000ff0,
+unsigned pci1234[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0
};
+
unsigned hc_possible_num;
unsigned sbdn;
-unsigned hcdn[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+unsigned hcdn[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
0x20202020,
0x20202020,
- 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
};
+
unsigned sbdn3;
unsigned sbdnb;
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
@@ -70,9 +67,10 @@ void get_bus_conf(void)
unsigned apicid_base;
- device_t dev;
+ device_t dev;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
get_bus_conf_done = 1;
@@ -80,188 +78,202 @@ void get_bus_conf(void)
get_sblk_pci1234();
- sbdn = (hcdn[0] & 0xff); // first byte of first chain
+ sbdn = (hcdn[0] & 0xff); // first byte of first chain
sbdn3 = (hcdn[1] & 0xff);
- sbdnb = (hcdn[2] & 0xff); // first byte of second chain
+ sbdnb = (hcdn[2] & 0xff); // first byte of second chain
-// bus_ck804_0 = node_link_to_bus(0, sblk);
+// bus_ck804_0 = node_link_to_bus(0, sblk);
bus_ck804_0 = (pci1234[0] >> 16) & 0xff;
- /* CK804 */
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09,0));
- if (dev) {
- bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ /* CK804 */
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09, 0));
+ if (dev) {
+ bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
#if 0
- bus_ck804_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_2++;
+ bus_ck804_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_2++;
#else
- bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_5++;
+ bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_5++;
#endif
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x09);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x09);
- bus_ck804_1 = 2;
+ bus_ck804_1 = 2;
#if 0
- bus_ck804_2 = 3;
+ bus_ck804_2 = 3;
#else
- bus_ck804_5 = 3;
+ bus_ck804_5 = 3;
#endif
- }
+ }
#if 0
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0b,0));
- if (dev) {
- bus_ck804_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_3 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_3++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x0b);
-
- bus_ck804_3 = bus_ck804_2+1;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0c,0));
- if (dev) {
- bus_ck804_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_4++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x0c);
-
- bus_ck804_4 = bus_ck804_3+1;
- }
-
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d,0));
- if (dev) {
- bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_5++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n",sbdn + 0x0d);
-
- bus_ck804_5 = bus_ck804_4+1;
- }
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0b, 0));
+ if (dev) {
+ bus_ck804_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_3 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_3++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0b);
+
+ bus_ck804_3 = bus_ck804_2 + 1;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0c, 0));
+ if (dev) {
+ bus_ck804_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_4++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0c);
+
+ bus_ck804_4 = bus_ck804_3 + 1;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d, 0));
+ if (dev) {
+ bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_5++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0d);
+
+ bus_ck804_5 = bus_ck804_4 + 1;
+ }
#endif
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
- if (dev) {
- bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
- }
-
- bus_8131_0 = (pci1234[1] >> 16) & 0xff;
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_8131_2++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
-
- bus_8131_1 = bus_8131_0+1;
- bus_8131_2 = bus_8131_0+2;
- }
- /* 8131-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
-
- bus_8131_2 = bus_8131_1+1;
- }
-
- /* CK804b */
-
- if(pci1234[2] & 0xf) { //if the second cpu is installed
- bus_ck804b_0 = (pci1234[2]>>16) & 0xff;
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0e, 0));
+ if (dev) {
+ bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0e);
+ }
+
+ bus_8131_0 = (pci1234[1] >> 16) & 0xff;
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_8131_2++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_1 = bus_8131_0 + 1;
+ bus_8131_2 = bus_8131_0 + 2;
+ }
+ /* 8131-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_2 = bus_8131_1 + 1;
+ }
+
+ /* CK804b */
+
+ if (pci1234[2] & 0xf) { //if the second cpu is installed
+ bus_ck804b_0 = (pci1234[2] >> 16) & 0xff;
#if 0
- dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x09,0));
- if (dev) {
- bus_ck804b_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804b_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804b_2++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x09);
-
- bus_ck804b_1 = bus_ck804b_0+1;
- bus_ck804b_2 = bus_ck804b_0+2;
- }
-
- dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0b,0));
- if (dev) {
- bus_ck804b_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804b_3 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804b_3++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0b);
-
- bus_ck804b_2 = bus_ck804b_0+1;
- bus_ck804b_3 = bus_ck804b_0+2;
- }
-
- dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0c,0));
- if (dev) {
- bus_ck804b_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804b_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804b_4++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0c);
-
- bus_ck804b_4 = bus_ck804b_3+1;
- }
- dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0d,0));
- if (dev) {
- bus_ck804b_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804b_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804b_5++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0d);
-
- bus_ck804b_5 = bus_ck804b_4+1;
- }
+ dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x09, 0));
+ if (dev) {
+ bus_ck804b_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804b_2 =
+ pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804b_2++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ bus_ck804b_0, sbdnb + 0x09);
+
+ bus_ck804b_1 = bus_ck804b_0 + 1;
+ bus_ck804b_2 = bus_ck804b_0 + 2;
+ }
+
+ dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0b, 0));
+ if (dev) {
+ bus_ck804b_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804b_3 =
+ pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804b_3++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ bus_ck804b_0, sbdnb + 0x0b);
+
+ bus_ck804b_2 = bus_ck804b_0 + 1;
+ bus_ck804b_3 = bus_ck804b_0 + 2;
+ }
+
+ dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0c, 0));
+ if (dev) {
+ bus_ck804b_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804b_4 =
+ pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804b_4++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ bus_ck804b_0, sbdnb + 0x0c);
+
+ bus_ck804b_4 = bus_ck804b_3 + 1;
+ }
+ dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0d, 0));
+ if (dev) {
+ bus_ck804b_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804b_5 =
+ pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804b_5++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ bus_ck804b_0, sbdnb + 0x0d);
+
+ bus_ck804b_5 = bus_ck804b_4 + 1;
+ }
#endif
- dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e,0));
- if (dev) {
- bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0e);
+ dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e, 0));
+ if (dev) {
+ bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ bus_ck804b_0, sbdnb + 0x0e);
#if 1
- bus_ck804b_5 = bus_ck804b_4+1;
+ bus_ck804b_5 = bus_ck804b_4 + 1;
#endif
- }
+ }
}
-
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
apicid_base = get_apicid_base(4);
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_ck804 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
- apicid_ck804b = apicid_base+3;
+ apicid_ck804 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
+ apicid_ck804b = apicid_base + 3;
}
diff --git a/src/mainboard/supermicro/h8dme/get_bus_conf.c b/src/mainboard/supermicro/h8dme/get_bus_conf.c
index 5b16f83384..0279f8f7f6 100644
--- a/src/mainboard/supermicro/h8dme/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8dme/get_bus_conf.c
@@ -31,19 +31,17 @@
#include <cpu/amd/amdk8_sysconf.h>
#include <stdlib.h>
-
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_mcp55[8]; //1
- unsigned apicid_mcp55;
+unsigned char bus_mcp55[8]; //1
+unsigned apicid_mcp55;
- unsigned char bus_pcix[3]; // under bus_mcp55_2
+unsigned char bus_pcix[3]; // under bus_mcp55_2
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -51,8 +49,8 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
0x20202020,
// 0x20202020,
@@ -62,9 +60,8 @@ unsigned hcdnx[] =
// 0x20202020,
// 0x20202020,
};
-unsigned sbdnb;
-
+unsigned sbdnb;
static unsigned get_bus_conf_done = 0;
@@ -74,71 +71,75 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
- sbdnb = (sysconf.hcdn[1] & 0xff); // first byte of second chain
+ sbdnb = (sysconf.hcdn[1] & 0xff); // first byte of second chain
- for(i=0; i<8; i++) {
+ for (i = 0; i < 8; i++) {
bus_mcp55[i] = 0;
}
- for(i=0; i<3; i++) {
+ for (i = 0; i < 3; i++) {
bus_pcix[i] = 0;
}
-
bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- /* MCP55 */
- dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06,0));
- if (dev) {
- bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_mcp55[2]++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
-
- bus_mcp55[1] = 2;
- bus_mcp55[2] = 3;
- }
-
- for(i=2; i<8;i++) {
- dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
- if (dev) {
- bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 );
- }
+ /* MCP55 */
+ dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06, 0));
+ if (dev) {
+ bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_mcp55[2]++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x06);
+
+ bus_mcp55[1] = 2;
+ bus_mcp55[2] = 3;
+ }
+
+ for (i = 2; i < 8; i++) {
+ dev =
+ dev_find_slot(bus_mcp55[0],
+ PCI_DEVFN(sbdn + 0x0a + i - 2, 0));
+ if (dev) {
+ bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ bus_mcp55[0], sbdn + 0x0a + i - 2);
}
+ }
- if(bus_mcp55[2]) {
- for(i=0;i<2; i++) {
- dev = dev_find_slot(bus_mcp55[2], PCI_DEVFN(0, i));
- if(dev) {
- bus_pcix[0] = bus_mcp55[2];
- bus_pcix[i+1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
+ if (bus_mcp55[2]) {
+ for (i = 0; i < 2; i++) {
+ dev = dev_find_slot(bus_mcp55[2], PCI_DEVFN(0, i));
+ if (dev) {
+ bus_pcix[0] = bus_mcp55[2];
+ bus_pcix[i + 1] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
}
}
-
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -146,6 +147,6 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_mcp55 = apicid_base+0;
+ apicid_mcp55 = apicid_base + 0;
}
diff --git a/src/mainboard/supermicro/h8dmr/get_bus_conf.c b/src/mainboard/supermicro/h8dmr/get_bus_conf.c
index 5b16f83384..0279f8f7f6 100644
--- a/src/mainboard/supermicro/h8dmr/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8dmr/get_bus_conf.c
@@ -31,19 +31,17 @@
#include <cpu/amd/amdk8_sysconf.h>
#include <stdlib.h>
-
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_mcp55[8]; //1
- unsigned apicid_mcp55;
+unsigned char bus_mcp55[8]; //1
+unsigned apicid_mcp55;
- unsigned char bus_pcix[3]; // under bus_mcp55_2
+unsigned char bus_pcix[3]; // under bus_mcp55_2
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -51,8 +49,8 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
0x20202020,
// 0x20202020,
@@ -62,9 +60,8 @@ unsigned hcdnx[] =
// 0x20202020,
// 0x20202020,
};
-unsigned sbdnb;
-
+unsigned sbdnb;
static unsigned get_bus_conf_done = 0;
@@ -74,71 +71,75 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
- sbdnb = (sysconf.hcdn[1] & 0xff); // first byte of second chain
+ sbdnb = (sysconf.hcdn[1] & 0xff); // first byte of second chain
- for(i=0; i<8; i++) {
+ for (i = 0; i < 8; i++) {
bus_mcp55[i] = 0;
}
- for(i=0; i<3; i++) {
+ for (i = 0; i < 3; i++) {
bus_pcix[i] = 0;
}
-
bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff;
- /* MCP55 */
- dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06,0));
- if (dev) {
- bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_mcp55[2]++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x06);
-
- bus_mcp55[1] = 2;
- bus_mcp55[2] = 3;
- }
-
- for(i=2; i<8;i++) {
- dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x0a + i - 2 , 0));
- if (dev) {
- bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_mcp55[0], sbdn + 0x0a + i - 2 );
- }
+ /* MCP55 */
+ dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x06, 0));
+ if (dev) {
+ bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_mcp55[2] = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_mcp55[2]++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x06);
+
+ bus_mcp55[1] = 2;
+ bus_mcp55[2] = 3;
+ }
+
+ for (i = 2; i < 8; i++) {
+ dev =
+ dev_find_slot(bus_mcp55[0],
+ PCI_DEVFN(sbdn + 0x0a + i - 2, 0));
+ if (dev) {
+ bus_mcp55[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ bus_mcp55[0], sbdn + 0x0a + i - 2);
}
+ }
- if(bus_mcp55[2]) {
- for(i=0;i<2; i++) {
- dev = dev_find_slot(bus_mcp55[2], PCI_DEVFN(0, i));
- if(dev) {
- bus_pcix[0] = bus_mcp55[2];
- bus_pcix[i+1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
+ if (bus_mcp55[2]) {
+ for (i = 0; i < 2; i++) {
+ dev = dev_find_slot(bus_mcp55[2], PCI_DEVFN(0, i));
+ if (dev) {
+ bus_pcix[0] = bus_mcp55[2];
+ bus_pcix[i + 1] =
+ pci_read_config8(dev, PCI_SECONDARY_BUS);
}
}
-
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -146,6 +147,6 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_mcp55 = apicid_base+0;
+ apicid_mcp55 = apicid_base + 0;
}
diff --git a/src/mainboard/tyan/s2881/get_bus_conf.c b/src/mainboard/tyan/s2881/get_bus_conf.c
index c7b62c768d..332e578296 100644
--- a/src/mainboard/tyan/s2881/get_bus_conf.c
+++ b/src/mainboard/tyan/s2881/get_bus_conf.c
@@ -10,7 +10,6 @@
#include <cpu/amd/amdk8_sysconf.h>
#include <stdlib.h>
-
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
unsigned char bus_8131_0 = 1;
@@ -18,14 +17,13 @@ unsigned char bus_8131_1 = 2;
unsigned char bus_8131_2 = 3;
unsigned char bus_8111_0 = 1;
unsigned char bus_8111_1 = 4;
-unsigned apicid_8111 ;
+unsigned apicid_8111;
unsigned apicid_8131_1;
unsigned apicid_8131_2;
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -34,10 +32,10 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
-// 0x20202020,
+// 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -45,9 +43,8 @@ unsigned hcdnx[] =
// 0x20202020,
// 0x20202020,
};
-unsigned sbdn3;
-
+unsigned sbdn3;
static unsigned get_bus_conf_done = 0;
@@ -56,20 +53,21 @@ void get_bus_conf(void)
unsigned apicid_base;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
sbdn3 = sysconf.hcdn[0] & 0xff;
@@ -77,33 +75,35 @@ void get_bus_conf(void)
bus_8131_0 = (sysconf.pci1234[0] >> 16) & 0xff;
bus_8111_0 = bus_8131_0;
- /* 8111 */
- dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
- if (dev) {
- bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
- }
-
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
- }
-
- /* 8132-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
- }
-
+ /* 8111 */
+ dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn, 0));
+ if (dev) {
+ bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:03.0, using defaults\n",
+ bus_8111_0);
+ }
+
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+ }
+
+ /* 8132-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -111,7 +111,7 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_8111 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
+ apicid_8111 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
}
diff --git a/src/mainboard/tyan/s2885/get_bus_conf.c b/src/mainboard/tyan/s2885/get_bus_conf.c
index e390f7c106..88706c0bd5 100644
--- a/src/mainboard/tyan/s2885/get_bus_conf.c
+++ b/src/mainboard/tyan/s2885/get_bus_conf.c
@@ -19,15 +19,14 @@ unsigned char bus_8111_0 = 1;
unsigned char bus_8111_1 = 4;
unsigned char bus_8151_0 = 5;
unsigned char bus_8151_1 = 6;
-unsigned apicid_8111 ;
+unsigned apicid_8111;
unsigned apicid_8131_1;
unsigned apicid_8131_2;
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -35,8 +34,8 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
0x20202020,
// 0x20202020,
@@ -46,11 +45,10 @@ unsigned hcdnx[] =
// 0x20202020,
// 0x20202020,
};
+
unsigned sbdn3;
unsigned sbdn5;
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
@@ -58,20 +56,21 @@ void get_bus_conf(void)
unsigned apicid_base;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
sbdn3 = sysconf.hcdn[0] & 0xff;
@@ -80,43 +79,46 @@ void get_bus_conf(void)
bus_8131_0 = (sysconf.pci1234[0] >> 16) & 0xff;
bus_8111_0 = bus_8131_0;
- /* 8111 */
- dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn,0));
- if (dev) {
- bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0);
- }
-
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
- }
-
- /* 8132-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
- }
-
- /* HT chain 1 */
+ /* 8111 */
+ dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sysconf.sbdn, 0));
+ if (dev) {
+ bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:03.0, using defaults\n",
+ bus_8111_0);
+ }
+
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+ }
+
+ /* 8132-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+ }
+
+ /* HT chain 1 */
// it is on node0, so it must be there
bus_8151_0 = (sysconf.pci1234[1] >> 16) & 0xff;
- /* 8151 */
- dev = dev_find_slot(bus_8151_0, PCI_DEVFN(sbdn5+1, 0));
+ /* 8151 */
+ dev = dev_find_slot(bus_8151_0, PCI_DEVFN(sbdn5 + 1, 0));
- if (dev) {
- bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ if (dev) {
+ bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
// printk(BIOS_DEBUG, "bus_8151_1=%d\n",bus_8151_1);
- }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -124,7 +126,7 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_8111 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
+ apicid_8111 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
}
diff --git a/src/mainboard/tyan/s2891/get_bus_conf.c b/src/mainboard/tyan/s2891/get_bus_conf.c
index 6be68adbec..e94c608cc7 100644
--- a/src/mainboard/tyan/s2891/get_bus_conf.c
+++ b/src/mainboard/tyan/s2891/get_bus_conf.c
@@ -12,38 +12,36 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_ck804_0; //1
- unsigned char bus_ck804_1; //2
- unsigned char bus_ck804_2; //3
- unsigned char bus_ck804_3; //4
- unsigned char bus_ck804_4; //5
- unsigned char bus_ck804_5; //6
- unsigned char bus_8131_0; //7
- unsigned char bus_8131_1; //8
- unsigned char bus_8131_2; //9
- unsigned char bus_coproc_0;
- unsigned apicid_ck804;
- unsigned apicid_8131_1;
- unsigned apicid_8131_2;
-
-
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000000,
- 0x0000200,
- 0x0000100,
+unsigned char bus_ck804_0; //1
+unsigned char bus_ck804_1; //2
+unsigned char bus_ck804_2; //3
+unsigned char bus_ck804_3; //4
+unsigned char bus_ck804_4; //5
+unsigned char bus_ck804_5; //6
+unsigned char bus_8131_0; //7
+unsigned char bus_8131_1; //8
+unsigned char bus_8131_2; //9
+unsigned char bus_coproc_0;
+unsigned apicid_ck804;
+unsigned apicid_8131_1;
+unsigned apicid_8131_2;
+
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000000,
+ 0x0000200,
+ 0x0000100,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
0x20202020,
0x20202020,
- 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -54,8 +52,6 @@ unsigned hcdnx[] =
unsigned sbdn3;
unsigned coprocdn;
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
@@ -64,93 +60,97 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
- sbdn3 = (sysconf.hcdn[1] & 0xff); // first byte of second chain
+ sbdn3 = (sysconf.hcdn[1] & 0xff); // first byte of second chain
bus_ck804_0 = (sysconf.pci1234[0] >> 16) & 0xff;
-
- /* CK804 */
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09,0));
- if (dev) {
- bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_4++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x09);
-
- bus_ck804_1 = 2;
- bus_ck804_4 = 3;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d,0));
- if (dev) {
- bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_5++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n",sbdn + 0x0d);
-
- bus_ck804_5 = bus_ck804_4+1;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
- if (dev) {
- bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
- }
-
- bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_8131_2++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
-
- bus_8131_1 = bus_8131_0+1;
- bus_8131_2 = bus_8131_0+2;
- }
- /* 8131-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
-
- bus_8131_2 = bus_8131_1+1;
- }
-
- if(sysconf.pci1234[2] & 1) {
- bus_coproc_0 = (sysconf.pci1234[2] >> 16) & 0xff;
- coprocdn = (sysconf.hcdn[2] & 0xff);
- }
-
+ /* CK804 */
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09, 0));
+ if (dev) {
+ bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_4++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x09);
+
+ bus_ck804_1 = 2;
+ bus_ck804_4 = 3;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d, 0));
+ if (dev) {
+ bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_5++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0d);
+
+ bus_ck804_5 = bus_ck804_4 + 1;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0e, 0));
+ if (dev) {
+ bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0e);
+ }
+
+ bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_8131_2++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_1 = bus_8131_0 + 1;
+ bus_8131_2 = bus_8131_0 + 2;
+ }
+ /* 8131-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_2 = bus_8131_1 + 1;
+ }
+
+ if (sysconf.pci1234[2] & 1) {
+ bus_coproc_0 = (sysconf.pci1234[2] >> 16) & 0xff;
+ coprocdn = (sysconf.hcdn[2] & 0xff);
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -158,7 +158,7 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_ck804 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
+ apicid_ck804 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
}
diff --git a/src/mainboard/tyan/s2892/get_bus_conf.c b/src/mainboard/tyan/s2892/get_bus_conf.c
index 174632fa44..0ead854448 100644
--- a/src/mainboard/tyan/s2892/get_bus_conf.c
+++ b/src/mainboard/tyan/s2892/get_bus_conf.c
@@ -12,24 +12,23 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_ck804_0; //1
- unsigned char bus_ck804_1; //2
- unsigned char bus_ck804_2; //3
- unsigned char bus_ck804_3; //4
- unsigned char bus_ck804_4; //5
- unsigned char bus_ck804_5; //6
- unsigned char bus_8131_0; //7
- unsigned char bus_8131_1; //8
- unsigned char bus_8131_2; //9
- unsigned apicid_ck804;
- unsigned apicid_8131_1;
- unsigned apicid_8131_2;
-
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
+unsigned char bus_ck804_0; //1
+unsigned char bus_ck804_1; //2
+unsigned char bus_ck804_2; //3
+unsigned char bus_ck804_3; //4
+unsigned char bus_ck804_4; //5
+unsigned char bus_ck804_5; //6
+unsigned char bus_8131_0; //7
+unsigned char bus_8131_1; //8
+unsigned char bus_8131_2; //9
+unsigned apicid_ck804;
+unsigned apicid_8131_1;
+unsigned apicid_8131_2;
+
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@@ -37,8 +36,8 @@ unsigned pci1234x[] =
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
0x20202020,
// 0x20202020,
@@ -51,8 +50,6 @@ unsigned hcdnx[] =
unsigned sbdn3;
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
@@ -61,89 +58,92 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
- sbdn3 = (sysconf.hcdn[1] & 0xff); // first byte of second chain
+ sbdn3 = (sysconf.hcdn[1] & 0xff); // first byte of second chain
bus_ck804_0 = (sysconf.pci1234[0] >> 16) & 0xff;
-
- /* CK804 */
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09,0));
- if (dev) {
- bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_4++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x09);
-
- bus_ck804_1 = 2;
- bus_ck804_4 = 3;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d,0));
- if (dev) {
- bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_5++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n",sbdn + 0x0d);
-
- bus_ck804_5 = bus_ck804_4+1;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
- if (dev) {
- bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
- }
-
- bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_8131_2++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
-
- bus_8131_1 = bus_8131_0+1;
- bus_8131_2 = bus_8131_0+2;
- }
- /* 8131-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
-
- bus_8131_2 = bus_8131_1+1;
- }
-
-
+ /* CK804 */
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09, 0));
+ if (dev) {
+ bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_4 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_4++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x09);
+
+ bus_ck804_1 = 2;
+ bus_ck804_4 = 3;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0d, 0));
+ if (dev) {
+ bus_ck804_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_5++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0d);
+
+ bus_ck804_5 = bus_ck804_4 + 1;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0e, 0));
+ if (dev) {
+ bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0e);
+ }
+
+ bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_8131_2++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_1 = bus_8131_0 + 1;
+ bus_8131_2 = bus_8131_0 + 2;
+ }
+ /* 8131-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_2 = bus_8131_1 + 1;
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -151,7 +151,7 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_ck804 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
+ apicid_ck804 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
}
diff --git a/src/mainboard/tyan/s2895/get_bus_conf.c b/src/mainboard/tyan/s2895/get_bus_conf.c
index abd6297b48..11b1bc211e 100644
--- a/src/mainboard/tyan/s2895/get_bus_conf.c
+++ b/src/mainboard/tyan/s2895/get_bus_conf.c
@@ -12,43 +12,42 @@
// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables
//busnum is default
- unsigned char bus_ck804_0; //1
- unsigned char bus_ck804_1; //2
- unsigned char bus_ck804_2; //3
- unsigned char bus_ck804_3; //4
- unsigned char bus_ck804_4; //5
- unsigned char bus_ck804_5; //6
- unsigned char bus_8131_0; //7
- unsigned char bus_8131_1; //8
- unsigned char bus_8131_2; //9
- unsigned char bus_ck804b_0;//a
- unsigned char bus_ck804b_1;//b
- unsigned char bus_ck804b_2;//c
- unsigned char bus_ck804b_3;//d
- unsigned char bus_ck804b_4;//e
- unsigned char bus_ck804b_5;//f
- unsigned apicid_ck804;
- unsigned apicid_8131_1;
- unsigned apicid_8131_2;
- unsigned apicid_ck804b;
-
-unsigned pci1234x[] =
-{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
- //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
- 0x0000ff0,
- 0x0000ff0,
- 0x0000ff0,
+unsigned char bus_ck804_0; //1
+unsigned char bus_ck804_1; //2
+unsigned char bus_ck804_2; //3
+unsigned char bus_ck804_3; //4
+unsigned char bus_ck804_4; //5
+unsigned char bus_ck804_5; //6
+unsigned char bus_8131_0; //7
+unsigned char bus_8131_1; //8
+unsigned char bus_8131_2; //9
+unsigned char bus_ck804b_0; //a
+unsigned char bus_ck804b_1; //b
+unsigned char bus_ck804b_2; //c
+unsigned char bus_ck804b_3; //d
+unsigned char bus_ck804b_4; //e
+unsigned char bus_ck804b_5; //f
+unsigned apicid_ck804;
+unsigned apicid_8131_1;
+unsigned apicid_8131_2;
+unsigned apicid_ck804b;
+
+unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not
+ //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
+ 0x0000ff0,
+ 0x0000ff0,
+ 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0
};
-unsigned hcdnx[] =
-{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+
+unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
+ 0x20202020,
0x20202020,
0x20202020,
- 0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@@ -59,8 +58,6 @@ unsigned hcdnx[] =
unsigned sbdn3;
unsigned sbdnb;
-
-
static unsigned get_bus_conf_done = 0;
void get_bus_conf(void)
@@ -69,92 +66,97 @@ void get_bus_conf(void)
unsigned apicid_base;
unsigned sbdn;
- device_t dev;
- int i;
+ device_t dev;
+ int i;
- if(get_bus_conf_done==1) return; //do it only once
+ if (get_bus_conf_done == 1)
+ return; //do it only once
- get_bus_conf_done = 1;
+ get_bus_conf_done = 1;
- sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
- for(i=0;i<sysconf.hc_possible_num; i++) {
- sysconf.pci1234[i] = pci1234x[i];
- sysconf.hcdn[i] = hcdnx[i];
- }
+ sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
+ for (i = 0; i < sysconf.hc_possible_num; i++) {
+ sysconf.pci1234[i] = pci1234x[i];
+ sysconf.hcdn[i] = hcdnx[i];
+ }
- get_sblk_pci1234();
+ get_sblk_pci1234();
- sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
+ sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain
sbdn = sysconf.sbdn;
sbdn3 = (sysconf.hcdn[1] & 0xff);
- sbdnb = (sysconf.hcdn[2] & 0xff); // first byte of second chain
+ sbdnb = (sysconf.hcdn[2] & 0xff); // first byte of second chain
bus_ck804_0 = (sysconf.pci1234[0] >> 16) & 0xff;
- /* CK804 */
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09,0));
- if (dev) {
- bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_ck804_5++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn + 0x09);
-
- bus_ck804_1 = 2;
- bus_ck804_5 = 3;
- }
-
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x0e,0));
- if (dev) {
- bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:%02x.0, using defaults\n", sbdn+ 0x0e);
- }
-
- bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
- /* 8131-1 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
- bus_8131_2++;
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0);
-
- bus_8131_1 = bus_8131_0+1;
- bus_8131_2 = bus_8131_0+2;
- }
- /* 8131-2 */
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0));
- if (dev) {
- bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0);
-
- bus_8131_2 = bus_8131_1+1;
- }
-
- /* CK804b */
-
- if(sysconf.pci1234[2] & 0x0f) { //if the second cpu is installed
- bus_ck804b_0 = (sysconf.pci1234[2]>>16) & 0xff;
-
- dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e,0));
- if (dev) {
- bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI %02x:%02x.0, using defaults\n", bus_ck804b_0,sbdnb+0x0e);
- bus_ck804b_5 = bus_ck804b_4+1;
- }
+ /* CK804 */
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09, 0));
+ if (dev) {
+ bus_ck804_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_ck804_5 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_ck804_5++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x09);
+
+ bus_ck804_1 = 2;
+ bus_ck804_5 = 3;
+ }
+
+ dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x0e, 0));
+ if (dev) {
+ bus_ck804_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI 1:%02x.0, using defaults\n",
+ sbdn + 0x0e);
}
+ bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff;
+ /* 8131-1 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
+ bus_8131_2++;
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:01.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_1 = bus_8131_0 + 1;
+ bus_8131_2 = bus_8131_0 + 2;
+ }
+ /* 8131-2 */
+ dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0));
+ if (dev) {
+ bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:02.0, using defaults\n",
+ bus_8131_0);
+
+ bus_8131_2 = bus_8131_1 + 1;
+ }
+
+ /* CK804b */
+
+ if (sysconf.pci1234[2] & 0x0f) { //if the second cpu is installed
+ bus_ck804b_0 = (sysconf.pci1234[2] >> 16) & 0xff;
+
+ dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x0e, 0));
+ if (dev) {
+ bus_ck804b_5 = pci_read_config8(dev, PCI_SECONDARY_BUS);
+ } else {
+ printk(BIOS_DEBUG,
+ "ERROR - could not find PCI %02x:%02x.0, using defaults\n",
+ bus_ck804b_0, sbdnb + 0x0e);
+ bus_ck804b_5 = bus_ck804b_4 + 1;
+ }
+ }
/*I/O APICs: APIC ID Version State Address*/
#if CONFIG_LOGICAL_CPUS
@@ -162,8 +164,8 @@ void get_bus_conf(void)
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
#endif
- apicid_ck804 = apicid_base+0;
- apicid_8131_1 = apicid_base+1;
- apicid_8131_2 = apicid_base+2;
- apicid_ck804b = apicid_base+3;
+ apicid_ck804 = apicid_base + 0;
+ apicid_8131_1 = apicid_base + 1;
+ apicid_8131_2 = apicid_base + 2;
+ apicid_ck804b = apicid_base + 3;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 08:50:55 +0000