summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/soc/intel/alderlake/include/soc/vr_config.h6
-rw-r--r--src/soc/intel/alderlake/vr_config.c6
2 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/include/soc/vr_config.h b/src/soc/intel/alderlake/include/soc/vr_config.h
index 3bf3c4adca..316abc0dd2 100644
--- a/src/soc/intel/alderlake/include/soc/vr_config.h
+++ b/src/soc/intel/alderlake/include/soc/vr_config.h
@@ -28,6 +28,12 @@ struct vr_config {
/* Thermal Design Current current limit.
Defined in 1/8A units and range is 0-4095. 1000 = 125A. */
uint16_t tdc_currentlimit;
+
+ /* Power State 1/2/3 Threshold Current.
+ Defined in 1/4A units and range is 0-128A */
+ uint16_t psi1threshold;
+ uint16_t psi2threshold;
+ uint16_t psi3threshold;
};
#define VR_CFG_AMP(i) (uint16_t)((i) * 4)
diff --git a/src/soc/intel/alderlake/vr_config.c b/src/soc/intel/alderlake/vr_config.c
index 1a6c6bd4ff..159f4514bd 100644
--- a/src/soc/intel/alderlake/vr_config.c
+++ b/src/soc/intel/alderlake/vr_config.c
@@ -272,6 +272,12 @@ void fill_vr_domain_config(FSP_S_CONFIG *s_cfg,
s_cfg->DcLoadline[domain] = cfg->dc_loadline;
if (cfg->icc_max)
s_cfg->IccMax[domain] = cfg->icc_max;
+ if (cfg->psi1threshold)
+ s_cfg->Psi1Threshold[domain] = cfg->psi1threshold;
+ if (cfg->psi2threshold)
+ s_cfg->Psi2Threshold[domain] = cfg->psi2threshold;
+ if (cfg->psi3threshold)
+ s_cfg->Psi3Threshold[domain] = cfg->psi3threshold;
s_cfg->TdcTimeWindow[domain] = cfg->tdc_timewindow;
s_cfg->TdcCurrentLimit[domain] = cfg->tdc_currentlimit;
} else {