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-rw-r--r--src/include/cpu/intel/cpu_ids.h1
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c1
-rw-r--r--src/soc/intel/tigerlake/bootblock/report_platform.c1
3 files changed, 3 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h
index d74cf1e2b1..ddb4e54c1e 100644
--- a/src/include/cpu/intel/cpu_ids.h
+++ b/src/include/cpu/intel/cpu_ids.h
@@ -46,6 +46,7 @@
#define CPUID_COMETLAKE_H_S_10_2_Q0 0xa0655
#define CPUID_TIGERLAKE_A0 0x806c0
#define CPUID_TIGERLAKE_B0 0x806c1
+#define CPUID_TIGERLAKE_P0 0x806d0
#define CPUID_TIGERLAKE_R0 0x806d1
#define CPUID_SAPPHIRERAPIDS_SP_A 0x806f0
#define CPUID_SAPPHIRERAPIDS_SP_B 0x806f1
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index bd435454d9..3cff6215d4 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -71,6 +71,7 @@ static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0, CPUID_EXACT_MATCH_MASK },
+ { X86_VENDOR_INTEL, CPUID_TIGERLAKE_P0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0, CPUID_EXACT_MATCH_MASK },
{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_B0, CPUID_EXACT_MATCH_MASK },
diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c
index 1ecaf77ab5..8f90b3c6a3 100644
--- a/src/soc/intel/tigerlake/bootblock/report_platform.c
+++ b/src/soc/intel/tigerlake/bootblock/report_platform.c
@@ -25,6 +25,7 @@ static struct {
} cpu_table[] = {
{ CPUID_TIGERLAKE_A0, "Tigerlake A0" },
{ CPUID_TIGERLAKE_B0, "Tigerlake B0" },
+ { CPUID_TIGERLAKE_P0, "Tigerlake P0" },
{ CPUID_TIGERLAKE_R0, "Tigerlake R0" },
};