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-rw-r--r--src/northbridge/intel/gm45/bootblock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c
index a0e8fc0631..2e41981e75 100644
--- a/src/northbridge/intel/gm45/bootblock.c
+++ b/src/northbridge/intel/gm45/bootblock.c
@@ -12,7 +12,7 @@ void bootblock_early_northbridge_init(void)
/*
* The "io" variant of the config access is explicitly used to
* setup the PCIEXBAR because CONFIG(MMCONF_SUPPORT) is set to
- * to true. That way all subsequent non-explicit config accesses use
+ * true. That way all subsequent non-explicit config accesses use
* MCFG. This code also assumes that bootblock_northbridge_init() is
* the first thing called in the non-asm boot block code. The final
* assumption is that no assembly code is using the