diff options
| -rw-r--r-- | src/mainboard/intel/bakersport_fsp/Kconfig | 70 | ||||
| -rw-r--r-- | src/mainboard/intel/bakersport_fsp/Kconfig.name | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/bakersport_fsp/board_info.txt | 5 | ||||
| -rw-r--r-- | src/mainboard/intel/bayleybay_fsp/Kconfig | 6 | ||||
| -rw-r--r-- | src/mainboard/intel/bayleybay_fsp/Kconfig.name | 3 |
5 files changed, 7 insertions, 79 deletions
diff --git a/src/mainboard/intel/bakersport_fsp/Kconfig b/src/mainboard/intel/bakersport_fsp/Kconfig deleted file mode 100644 index cc11790cb1..0000000000 --- a/src/mainboard/intel/bakersport_fsp/Kconfig +++ /dev/null @@ -1,70 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -if BOARD_INTEL_BAKERSPORT_FSP - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select SOC_INTEL_FSP_BAYTRAIL - select BOARD_ROMSIZE_KB_2048 - select HAVE_ACPI_TABLES - select HAVE_OPTION_TABLE - select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT - select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT - select TSC_MONOTONIC_TIMER - -config MAINBOARD_DIR - string - default "intel/bayleybay_fsp" - -config MAINBOARD_PART_NUMBER - string - default "Bakersport CRB (FSP)" - -config MAX_CPUS - int - default 16 - -config CACHE_ROM_SIZE_OVERRIDE - hex - default 0x800000 - -config FSP_FILE - string - default "../intel/fsp/baytrail/BAYTRAIL_FSP_ECC.fd" if BOARD_INTEL_BAKERSPORT_FSP - -config CBFS_SIZE - hex - default 0x00200000 - -config ENABLE_FSP_FAST_BOOT - bool - depends on HAVE_FSP_BIN - default y - -config VIRTUAL_ROM_SIZE - hex - depends on ENABLE_FSP_FAST_BOOT - default 0x800000 - -config FSP_PACKAGE_DEFAULT - bool "Configure defaults for the Intel FSP package" - default n - -config VGA_BIOS - bool - default y if FSP_PACKAGE_DEFAULT - -endif # BOARD_INTEL_BAKERSPORT_FSP diff --git a/src/mainboard/intel/bakersport_fsp/Kconfig.name b/src/mainboard/intel/bakersport_fsp/Kconfig.name deleted file mode 100644 index 65d538785a..0000000000 --- a/src/mainboard/intel/bakersport_fsp/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_INTEL_BAKERSPORT_FSP - bool "Bakersport FSP-based CRB" diff --git a/src/mainboard/intel/bakersport_fsp/board_info.txt b/src/mainboard/intel/bakersport_fsp/board_info.txt deleted file mode 100644 index e3d43b836f..0000000000 --- a/src/mainboard/intel/bakersport_fsp/board_info.txt +++ /dev/null @@ -1,5 +0,0 @@ -Board name: Bakersport -Category: eval -ROM protocol: SPI -ROM socketed: n -Release year: 2014 diff --git a/src/mainboard/intel/bayleybay_fsp/Kconfig b/src/mainboard/intel/bayleybay_fsp/Kconfig index 59aab76afd..e8318cb0f2 100644 --- a/src/mainboard/intel/bayleybay_fsp/Kconfig +++ b/src/mainboard/intel/bayleybay_fsp/Kconfig @@ -13,7 +13,7 @@ ## GNU General Public License for more details. ## -if BOARD_INTEL_BAYLEYBAY_FSP +if BOARD_INTEL_BAYLEYBAY_FSP || BOARD_INTEL_BAKERSPORT_FSP config BOARD_SPECIFIC_OPTIONS # dummy def_bool y @@ -31,6 +31,7 @@ config MAINBOARD_DIR config MAINBOARD_PART_NUMBER string + default "Bakersport CRB (FSP)" if BOARD_INTEL_BAKERSPORT_FSP default "Bayley Bay CRB (FSP)" config MAX_CPUS @@ -43,6 +44,7 @@ config CACHE_ROM_SIZE_OVERRIDE config FSP_FILE string + default "../intel/fsp/baytrail/BAYTRAIL_FSP_ECC.fd" if BOARD_INTEL_BAKERSPORT_FSP default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd" config CBFS_SIZE @@ -67,4 +69,4 @@ config VGA_BIOS bool default y if FSP_PACKAGE_DEFAULT -endif # BOARD_INTEL_BAYLEYBAY_FSP +endif # BOARD_INTEL_BAYLEYBAY_FSP || BOARD_INTEL_BAKERSPORT_FSP diff --git a/src/mainboard/intel/bayleybay_fsp/Kconfig.name b/src/mainboard/intel/bayleybay_fsp/Kconfig.name index 52e6aaa6c3..524c616ac2 100644 --- a/src/mainboard/intel/bayleybay_fsp/Kconfig.name +++ b/src/mainboard/intel/bayleybay_fsp/Kconfig.name @@ -1,2 +1,5 @@ +config BOARD_INTEL_BAKERSPORT_FSP + bool "Bakersport FSP-based CRB" + config BOARD_INTEL_BAYLEYBAY_FSP bool "Bayley Bay FSP-based CRB" |