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-rw-r--r--src/mainboard/google/rex/chromeos.c6
-rw-r--r--src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h2
2 files changed, 3 insertions, 5 deletions
diff --git a/src/mainboard/google/rex/chromeos.c b/src/mainboard/google/rex/chromeos.c
index 5c99371eb1..217b001a06 100644
--- a/src/mainboard/google/rex/chromeos.c
+++ b/src/mainboard/google/rex/chromeos.c
@@ -12,7 +12,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},
{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
- {GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"},
+ {-1, ACTIVE_HIGH, 0, "EC in RW"},
};
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
}
@@ -24,6 +24,6 @@ int get_write_protect_state(void)
int get_ec_is_trusted(void)
{
- /* EC is trusted if not in RW. */
- return !gpio_get(GPIO_EC_IN_RW);
+ /* VB2_CONTEXT_EC_TRUSTED should be set according to the Ti50 boot mode. */
+ return 0;
}
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h b/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h
index 9da31a69a6..51b9564070 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h
+++ b/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h
@@ -9,8 +9,6 @@
/* Fixme: Update proper GPIO number based on schematics */
/* WP signal to PCH */
#define GPIO_PCH_WP GPP_H10
-/* EC in RW or RO */
-#define GPIO_EC_IN_RW 0
/* GPIO IRQ for tight timestamps / wake support */
#define EC_SYNC_IRQ GPP_A17_IRQ
/* eSPI virtual wire reporting */