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-rw-r--r--src/cpu/amd/family_10h-family_15h/Kconfig1
-rw-r--r--src/cpu/intel/haswell/Kconfig1
-rw-r--r--src/cpu/intel/model_2065x/Kconfig1
-rw-r--r--src/cpu/intel/socket_FCBGA1023/Kconfig1
-rw-r--r--src/soc/amd/stoneyridge/Kconfig1
5 files changed, 0 insertions, 5 deletions
diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig
index 8e902478cc..cd3db0e420 100644
--- a/src/cpu/amd/family_10h-family_15h/Kconfig
+++ b/src/cpu/amd/family_10h-family_15h/Kconfig
@@ -4,7 +4,6 @@ config CPU_AMD_MODEL_10XXX
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
- select SSE
select SSE2
select TSC_SYNC_LFENCE
select UDELAY_LAPIC
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index 423966c2d4..3aadfdee5a 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -13,7 +13,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_MONOTONIC_TIMER
select SMP
select MMX
- select SSE
select SSE2
select UDELAY_TSC
select TSC_CONSTANT_RATE
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig
index 59bb8d8b86..9481917ff8 100644
--- a/src/cpu/intel/model_2065x/Kconfig
+++ b/src/cpu/intel/model_2065x/Kconfig
@@ -10,7 +10,6 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select SMP
- select SSE
select SSE2
select UDELAY_TSC
select TSC_CONSTANT_RATE
diff --git a/src/cpu/intel/socket_FCBGA1023/Kconfig b/src/cpu/intel/socket_FCBGA1023/Kconfig
index 3c6e2bfe25..bdac1dbd04 100644
--- a/src/cpu/intel/socket_FCBGA1023/Kconfig
+++ b/src/cpu/intel/socket_FCBGA1023/Kconfig
@@ -6,7 +6,6 @@ if CPU_INTEL_SOCKET_FCBGA1023
config SOCKET_SPECIFIC_OPTIONS # dummy
def_bool y
select MMX
- select SSE
select SSE2
endif
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 529d651243..03a40cc6ea 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -62,7 +62,6 @@ config CPU_SPECIFIC_OPTIONS
select SMM_TSEG
select POSTCAR_STAGE
select POSTCAR_CONSOLE
- select SSE
select SSE2
select RTC
select SOC_AMD_PSP_SELECTABLE_SMU_FW