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-rw-r--r--src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb5
-rw-r--r--src/mainboard/google/brya/variants/orisa/overridetree.cb4
-rw-r--r--src/mainboard/google/brya/variants/trulo/overridetree.cb4
3 files changed, 5 insertions, 8 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
index 6016a7f03a..3090bb54fa 100644
--- a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
@@ -1,5 +1,10 @@
chip soc/intel/alderlake
+ # GPE configuration
+ register "pmc_gpe0_dw0" = "GPP_A"
+ register "pmc_gpe0_dw1" = "GPP_B"
+ register "pmc_gpe0_dw2" = "GPP_F"
+
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
register "gen1_dec" = "0x00fc0801"
register "gen2_dec" = "0x000c0201"
diff --git a/src/mainboard/google/brya/variants/orisa/overridetree.cb b/src/mainboard/google/brya/variants/orisa/overridetree.cb
index 26b8c1d2f9..e49714297a 100644
--- a/src/mainboard/google/brya/variants/orisa/overridetree.cb
+++ b/src/mainboard/google/brya/variants/orisa/overridetree.cb
@@ -19,10 +19,6 @@ end
chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
- # GPE configuration
- register "pmc_gpe0_dw1" = "GPP_B"
- register "pmc_gpe0_dw2" = "GPP_F"
-
# S0ix enable
register "s0ix_enable" = "true"
diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb
index ae18a0f101..631fe7b8d8 100644
--- a/src/mainboard/google/brya/variants/trulo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb
@@ -19,10 +19,6 @@ end
chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
- # GPE configuration
- register "pmc_gpe0_dw1" = "GPP_B"
- register "pmc_gpe0_dw2" = "GPP_F"
-
# S0ix enable
register "s0ix_enable" = "true"