diff options
| -rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index fdfb65b6d9..abfc1d91ee 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -207,6 +207,10 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, dev = pcidev_path_on_root(SA_DEVFN_TBT3); m_cfg->TcssItbtPcie3En = is_dev_enabled(dev); + /* IPU */ + dev = pcidev_path_on_root(SA_DEVFN_IPU); + m_cfg->SaIpuEnable = is_dev_enabled(dev); + /* VT-d config */ m_cfg->VtdBaseAddress[VTD_GFX] = GFXVT_BASE_ADDRESS; m_cfg->VtdBaseAddress[VTD_IPU] = IPUVT_BASE_ADDRESS; |