diff options
| -rw-r--r-- | src/mainboard/amd/mayan/devicetree_phoenix.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/mayan/ec.c | 19 |
2 files changed, 19 insertions, 1 deletions
diff --git a/src/mainboard/amd/mayan/devicetree_phoenix.cb b/src/mainboard/amd/mayan/devicetree_phoenix.cb index 697db12f9f..ac219dc7f4 100644 --- a/src/mainboard/amd/mayan/devicetree_phoenix.cb +++ b/src/mainboard/amd/mayan/devicetree_phoenix.cb @@ -158,6 +158,7 @@ chip soc/amd/phoenix device domain 0 on device ref iommu on end + device ref gpp_bridge_1_1 on end # MXM device ref gpp_bridge_2_1 on end # GBE device ref gpp_bridge_2_2 on end # WIFI device ref gpp_bridge_2_4 on end # NVMe SSD diff --git a/src/mainboard/amd/mayan/ec.c b/src/mainboard/amd/mayan/ec.c index 1b1d09bc72..d60814fe9a 100644 --- a/src/mainboard/amd/mayan/ec.c +++ b/src/mainboard/amd/mayan/ec.c @@ -8,7 +8,14 @@ #define MAYAN_EC_CMD 0x666 #define MAYAN_EC_DATA 0x662 +#define EC_GPIO_1_ADDR 0xA1 +#define EC_GPIO_EVAL_PWREN BIT(1) + +#define EC_GPIO_2_ADDR 0xA2 +#define EC_GPIO_EVAL_SLOT_PWR BIT(5) + #define EC_GPIO_3_ADDR 0xA3 +#define EC_GPIO_EVAL_RST_AUX BIT(0) #define EC_GPIO_LOM_RESET_AUX BIT(1) #define EC_GPIO_7_ADDR 0xA7 @@ -35,8 +42,18 @@ static void configure_ec_gpio(void) { uint8_t tmp; + /* Enable MXM slot: set EC_GPIO_EVAL_PWREN, EC_GPIO_EVAL_SLOT_PWR + and EC_GPIO_EVAL_RST_AUX */ + tmp = ec_read(EC_GPIO_1_ADDR); + tmp |= EC_GPIO_EVAL_PWREN; + ec_write(EC_GPIO_1_ADDR, tmp); + + tmp = ec_read(EC_GPIO_2_ADDR); + tmp |= EC_GPIO_EVAL_SLOT_PWR; + ec_write(EC_GPIO_2_ADDR, tmp); + tmp = ec_read(EC_GPIO_3_ADDR); - tmp |= EC_GPIO_LOM_RESET_AUX; + tmp |= EC_GPIO_LOM_RESET_AUX | EC_GPIO_EVAL_RST_AUX; ec_write(EC_GPIO_3_ADDR, tmp); tmp = ec_read(EC_GPIO_7_ADDR); |