diff options
| -rw-r--r-- | src/soc/mediatek/mt8196/Makefile.mk | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8196/include/soc/usb.h | 29 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8196/usb.c | 20 |
3 files changed, 50 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index 37326dfb9f..c8845ac764 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -22,6 +22,7 @@ ramstage-y += emi.c ramstage-y += l2c_ops.c ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c ramstage-y += soc.c +ramstage-y += ../common/usb.c usb.c CPPFLAGS_common += -Isrc/soc/mediatek/mt8196/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include diff --git a/src/soc/mediatek/mt8196/include/soc/usb.h b/src/soc/mediatek/mt8196/include/soc/usb.h new file mode 100644 index 0000000000..5733da2ecf --- /dev/null +++ b/src/soc/mediatek/mt8196/include/soc/usb.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +/* + * This file is created based on MT8196 Functional Specification + * Chapter number: 5.5 + */ + +#ifndef SOC_MEDIATEK_MT8196_USB_H +#define SOC_MEDIATEK_MT8196_USB_H + +#include <soc/usb_common.h> + +struct ssusb_sif_port { + struct sif_u2_phy_com u2phy; + u32 reserved0[64 * 5]; + struct sif_u3phyd u3phyd; + u32 reserved1[64]; + struct sif_u3phya u3phya; + struct sif_u3phya_da u3phya_da; + u32 reserved2[64 * 3]; +}; +check_member(ssusb_sif_port, u3phyd, 0x600); +check_member(ssusb_sif_port, u3phya, 0x800); +check_member(ssusb_sif_port, u3phya_da, 0x900); +check_member(ssusb_sif_port, reserved2, 0xa00); + +#define USB_PORT_NUMBER 1 + +#endif diff --git a/src/soc/mediatek/mt8196/usb.c b/src/soc/mediatek/mt8196/usb.c new file mode 100644 index 0000000000..56fe15cb4d --- /dev/null +++ b/src/soc/mediatek/mt8196/usb.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +/* + * This file is created based on MT8188 Functional Specification + * Chapter number: 13.1,13.2 + */ + +#include <soc/addressmap.h> +#include <device/mmio.h> +#include <soc/usb.h> + +#define CTRL_U3_PORT_SS_SUP_SPEED (3U << 9) + +void mtk_usb_prepare(void) +{ + /* SW sets this register to change USB3.2 speed to Gen1-5Gbps */ + struct ssusb_ippc_regs *ippc_regs = (void *)(SSUSB_IPPC_BASE); + + clrsetbits32(&ippc_regs->u3_ctrl_p[0], CTRL_U3_PORT_SS_SUP_SPEED, 0); +} |