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-rw-r--r--src/soc/amd/glinda/espi_util.c2
-rw-r--r--src/soc/amd/mendocino/espi_util.c2
-rw-r--r--src/soc/amd/phoenix/espi_util.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/glinda/espi_util.c b/src/soc/amd/glinda/espi_util.c
index d26a29f650..067a722e41 100644
--- a/src/soc/amd/glinda/espi_util.c
+++ b/src/soc/amd/glinda/espi_util.c
@@ -4,7 +4,7 @@
#include <soc/espi.h>
#include <types.h>
-#define ESPI_CNTRL_REGISTER 0x10
+#define ESPI_CNTRL_REGISTER 0x10 /* SPI register, not eSPI register! */
#define LOCK_SPIX10_BIT2 BIT(3)
#define ESPI_MUX_SPI1 BIT(2)
#define ROM_ADDR_WR_PROT BIT(1)
diff --git a/src/soc/amd/mendocino/espi_util.c b/src/soc/amd/mendocino/espi_util.c
index 20db1b6d9e..ffc8169a54 100644
--- a/src/soc/amd/mendocino/espi_util.c
+++ b/src/soc/amd/mendocino/espi_util.c
@@ -4,7 +4,7 @@
#include <soc/espi.h>
#include <types.h>
-#define ESPI_CNTRL_REGISTER 0x10
+#define ESPI_CNTRL_REGISTER 0x10 /* SPI register, not eSPI register! */
#define LOCK_SPIX10_BIT2 BIT(3)
#define ESPI_MUX_SPI1 BIT(2)
#define ROM_ADDR_WR_PROT BIT(1)
diff --git a/src/soc/amd/phoenix/espi_util.c b/src/soc/amd/phoenix/espi_util.c
index 20db1b6d9e..ffc8169a54 100644
--- a/src/soc/amd/phoenix/espi_util.c
+++ b/src/soc/amd/phoenix/espi_util.c
@@ -4,7 +4,7 @@
#include <soc/espi.h>
#include <types.h>
-#define ESPI_CNTRL_REGISTER 0x10
+#define ESPI_CNTRL_REGISTER 0x10 /* SPI register, not eSPI register! */
#define LOCK_SPIX10_BIT2 BIT(3)
#define ESPI_MUX_SPI1 BIT(2)
#define ROM_ADDR_WR_PROT BIT(1)