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-rw-r--r--src/soc/mediatek/common/include/soc/mt6359p.h3
-rw-r--r--src/soc/mediatek/common/include/soc/regulator.h1
-rw-r--r--src/soc/mediatek/common/mt6359p.c5
3 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/include/soc/mt6359p.h b/src/soc/mediatek/common/include/soc/mt6359p.h
index a53be634ba..4bb62496aa 100644
--- a/src/soc/mediatek/common/include/soc/mt6359p.h
+++ b/src/soc/mediatek/common/include/soc/mt6359p.h
@@ -33,6 +33,7 @@ enum {
PMIC_VSIM1_CON0 = 0x1cd0,
PMIC_VSRAM_PROC1_ELR = 0x1b44,
PMIC_VSRAM_PROC2_ELR = 0x1b46,
+ PMIC_VM18_CON0 = 0x1d88,
PMIC_VSRAM_PROC1_VOSEL1 = 0x1e90,
PMIC_VSRAM_PROC2_VOSEL1 = 0x1eb0,
PMIC_VSIM1_ANA_CON0 = 0x1fa2,
@@ -60,6 +61,7 @@ enum {
MT6359P_CORE,
MT6359P_PA,
MT6359P_SIM1,
+ MT6359P_VM18,
MT6359P_MAX,
};
@@ -84,6 +86,7 @@ void mt6359p_set_vsim1_voltage(u32 vsim1_uv);
u32 mt6359p_get_vsim1_voltage(void);
void mt6359p_enable_vpa(bool enable);
void mt6359p_enable_vsim1(bool enable);
+void mt6359p_enable_vm18(bool enable);
void mt6359p_write_field(u32 reg, u32 val, u32 mask, u32 shift);
void pmic_init_setting(void);
void pmic_lp_setting(void);
diff --git a/src/soc/mediatek/common/include/soc/regulator.h b/src/soc/mediatek/common/include/soc/regulator.h
index 7f3bd49e04..e2b92517fd 100644
--- a/src/soc/mediatek/common/include/soc/regulator.h
+++ b/src/soc/mediatek/common/include/soc/regulator.h
@@ -22,6 +22,7 @@ enum mtk_regulator {
MTK_REGULATOR_VSRAM_PROC12,
MTK_REGULATOR_VRF12,
MTK_REGULATOR_VCN33,
+ MTK_REGULATOR_VDD18,
MTK_REGULATOR_NUM,
};
diff --git a/src/soc/mediatek/common/mt6359p.c b/src/soc/mediatek/common/mt6359p.c
index e2c8e14ca2..78af34e1eb 100644
--- a/src/soc/mediatek/common/mt6359p.c
+++ b/src/soc/mediatek/common/mt6359p.c
@@ -324,6 +324,11 @@ void mt6359p_enable_vsim1(bool enable)
mt6359p_write_field(PMIC_VSIM1_CON0, enable, 0x1, 0);
}
+void mt6359p_enable_vm18(bool enable)
+{
+ mt6359p_write_field(PMIC_VM18_CON0, enable, 0x1, 0);
+}
+
static void init_pmif_arb(void)
{
if (!pmif_arb) {