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-rw-r--r--src/mainboard/amd/serengeti_cheetah/dsdt.asl4
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl4
-rw-r--r--src/mainboard/hp/dl145_g1/dsdt.asl22
-rw-r--r--src/mainboard/iwill/dk8_htx/dsdt.asl5
-rw-r--r--src/southbridge/amd/amd8111/acpi/sleepstates.asl39
5 files changed, 40 insertions, 34 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/dsdt.asl b/src/mainboard/amd/serengeti_cheetah/dsdt.asl
index e9f1f471b9..7e119af5dd 100644
--- a/src/mainboard/amd/serengeti_cheetah/dsdt.asl
+++ b/src/mainboard/amd/serengeti_cheetah/dsdt.asl
@@ -26,10 +26,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Method (FWSO, 0, NotSerialized) { }
- Name (_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 })
- Name (_S1, Package (0x04) { 0x01, 0x01, 0x01, 0x01 })
- Name (_S3, Package (0x04) { 0x05, 0x05, 0x05, 0x05 })
- Name (_S5, Package (0x04) { 0x07, 0x07, 0x07, 0x07 })
Scope (_SB)
{
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl b/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
index affd5b6cce..9a49ab4361 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
@@ -25,10 +25,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
Method (FWSO, 0, NotSerialized) { }
- Name (_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 })
- Name (_S1, Package (0x04) { 0x01, 0x01, 0x01, 0x01 })
- Name (_S3, Package (0x04) { 0x05, 0x05, 0x05, 0x05 })
- Name (_S5, Package (0x04) { 0x07, 0x07, 0x07, 0x07 })
Scope (_SB)
{
diff --git a/src/mainboard/hp/dl145_g1/dsdt.asl b/src/mainboard/hp/dl145_g1/dsdt.asl
index 8d97c897c9..5227c3a8cf 100644
--- a/src/mainboard/hp/dl145_g1/dsdt.asl
+++ b/src/mainboard/hp/dl145_g1/dsdt.asl
@@ -203,27 +203,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
// Optional
//}
- // System \_Sx states
- // Four bytes must be stored for each supported power state:
- // 0:7 Value for PM1a_CNT.SLP_TYP register to enter this system state.
- // 8:f Value for PM1b_CNT.SLP_TYP register to enter this system state.
- // To enter any given state, OSPM must write the PM1a_CNT.SLP_TYP
- // register before the PM1b_CNT.SLP_TYP register.
- // 10:1f Reserved
- // The states are:
- // S0 : Working
- // S1 : Sleeping with Processor Context maintained
- // S2 : Sleeping with Processor Context not maintained
- // S3 : Same as S2, but more power saving (e.g. suspend to RAM)
- // S4 : DRAM context not maintained (e.g. suspend to disk)
- // S5 : Soft Off
- // If only S0 and S5 are declared then no wake-up methods are needed
- Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 })
- // S1 support should work, but never wakes up, so it's commented out
- //Name (\_S1, Package () { 0x01, 0x01, 0x01, 0x01 })
- //Name (\_S3, Package () { 0x05, 0x05, 0x05, 0x05 })
- Name (\_S5, Package () { 0x07, 0x07, 0x07, 0x07 })
- //Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 })
+ #include <southbridge/amd/amd8111/acpi/sleepstates.asl>
Method (WAK, 1, NotSerialized) {}
diff --git a/src/mainboard/iwill/dk8_htx/dsdt.asl b/src/mainboard/iwill/dk8_htx/dsdt.asl
index 9a2f570109..e1e6341a72 100644
--- a/src/mainboard/iwill/dk8_htx/dsdt.asl
+++ b/src/mainboard/iwill/dk8_htx/dsdt.asl
@@ -14,11 +14,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Method (FWSO, 0, NotSerialized) { }
- Name (_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 })
- Name (_S1, Package (0x04) { 0x01, 0x01, 0x01, 0x01 })
- Name (_S3, Package (0x04) { 0x05, 0x05, 0x05, 0x05 })
- Name (_S5, Package (0x04) { 0x07, 0x07, 0x07, 0x07 })
-
Scope (_SB)
{
Device (PCI0)
diff --git a/src/southbridge/amd/amd8111/acpi/sleepstates.asl b/src/southbridge/amd/amd8111/acpi/sleepstates.asl
new file mode 100644
index 0000000000..cb6c53782f
--- /dev/null
+++ b/src/southbridge/amd/amd8111/acpi/sleepstates.asl
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
+#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
+Name (SSFG, 0x05)
+#else
+Name (SSFG, 0x01)
+#endif
+
+/* Supported sleep states: */
+Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
+
+If (And(SSFG, 0x01)) {
+ Name(\_S1, Package () {0x01, 0x01, 0x01, 0x01} ) /* (S1) - sleeping w/CPU context */
+}
+If (And(SSFG, 0x02)) {
+ Name(\_S2, Package () {0x02, 0x02, 0x02, 0x02} ) /* (S2) - "light" Suspend to RAM */
+}
+If (And(SSFG, 0x04)) {
+ Name(\_S3, Package () {0x05, 0x05, 0x05, 0x05} ) /* (S3) - Suspend to RAM */
+}
+If (And(SSFG, 0x08)) {
+ Name(\_S4, Package () {0x06, 0x06, 0x06, 0x06} ) /* (S4) - Suspend to Disk */
+}
+
+Name(\_S5, Package () {0x07, 0x07, 0x07, 0x07} ) /* (S5) - Soft Off */