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-rw-r--r--src/soc/amd/stoneyridge/acpi/northbridge.asl2
-rw-r--r--src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl15
-rw-r--r--src/soc/amd/stoneyridge/acpi/soc.asl6
3 files changed, 5 insertions, 18 deletions
diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl
index c47b7b7842..af62abdbf2 100644
--- a/src/soc/amd/stoneyridge/acpi/northbridge.asl
+++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl
@@ -3,8 +3,6 @@
/* Note: Only need HID on Primary Bus */
External (TOM1)
External (TOM2)
-Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
-Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
/* Describe the Northbridge devices */
diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
index a4903e9b60..08f7a31b23 100644
--- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
+++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
@@ -7,21 +7,6 @@ External(\_SB.ALIB, MethodObj)
/* System Bus */
/* _SB.PCI0 */
-/* Operating System Capabilities Method */
-Method(_OSC,4)
-{
- /* Check for proper PCI/PCIe UUID */
- If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
- {
- /* Let OS control everything */
- Return (Arg3)
- } Else {
- CreateDWordField(Arg3,0,CDW1)
- CDW1 |= 4 // Unrecognized UUID
- Return (Arg3)
- }
-}
-
/* Describe the Southbridge devices */
/* 0:14.0 - SMBUS */
diff --git a/src/soc/amd/stoneyridge/acpi/soc.asl b/src/soc/amd/stoneyridge/acpi/soc.asl
index b411c20ba4..47d5992272 100644
--- a/src/soc/amd/stoneyridge/acpi/soc.asl
+++ b/src/soc/amd/stoneyridge/acpi/soc.asl
@@ -1,6 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-Device(PCI0) {
+#include <soc/amd/common/acpi/pci_root.asl>
+
+ROOT_BRIDGE(PCI0)
+
+Scope(PCI0) {
/* Describe the AMD Northbridge */
#include "northbridge.asl"