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-rw-r--r--src/soc/intel/broadwell/pch/pcie.c10
-rw-r--r--src/southbridge/intel/lynxpoint/pcie.c10
2 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/intel/broadwell/pch/pcie.c b/src/soc/intel/broadwell/pch/pcie.c
index ef03eee4d3..966a25d661 100644
--- a/src/soc/intel/broadwell/pch/pcie.c
+++ b/src/soc/intel/broadwell/pch/pcie.c
@@ -452,17 +452,17 @@ static void pch_pcie_early(struct device *dev)
break;
case 5:
/*
- * Bit 28 of b0d28f4 0x32c register correspond to
- * Root Ports 4:1.
+ * Bit 28 of b0d28f4 0x32c register corresponds to
+ * Root Port 5.
*/
do_aspm = !!(rpc.b0d28f4_32c & (1 << 28));
break;
case 6:
/*
- * Bit 28 of b0d28f5 0x32c register correspond to
- * Root Ports 4:1.
+ * Bit 29 of b0d28f5 0x32c register corresponds to
+ * Root Port 6.
*/
- do_aspm = !!(rpc.b0d28f5_32c & (1 << 28));
+ do_aspm = !!(rpc.b0d28f5_32c & (1 << 29));
break;
}
diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c
index 7f5e1face6..0c17c9c22e 100644
--- a/src/southbridge/intel/lynxpoint/pcie.c
+++ b/src/southbridge/intel/lynxpoint/pcie.c
@@ -518,17 +518,17 @@ static void pch_pcie_early(struct device *dev)
break;
case 5:
/*
- * Bit 28 of b0d28f4 0x32c register correspond to
- * Root Ports 4:1.
+ * Bit 28 of b0d28f4 0x32c register corresponds to
+ * Root Port 5.
*/
do_aspm = !!(rpc.b0d28f4_32c & (1 << 28));
break;
case 6:
/*
- * Bit 28 of b0d28f5 0x32c register correspond to
- * Root Ports 4:1.
+ * Bit 29 of b0d28f5 0x32c register corresponds to
+ * Root Port 6.
*/
- do_aspm = !!(rpc.b0d28f5_32c & (1 << 28));
+ do_aspm = !!(rpc.b0d28f5_32c & (1 << 29));
break;
}
} else {