diff options
| -rw-r--r-- | src/soc/intel/alderlake/acpi/pcie.asl | 13 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/acpi/pcie_pch_s.asl | 288 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/acpi/serialio.asl | 6 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/acpi/xhci.asl | 34 |
4 files changed, 337 insertions, 4 deletions
diff --git a/src/soc/intel/alderlake/acpi/pcie.asl b/src/soc/intel/alderlake/acpi/pcie.asl index f2123aa613..f1ae090524 100644 --- a/src/soc/intel/alderlake/acpi/pcie.asl +++ b/src/soc/intel/alderlake/acpi/pcie.asl @@ -54,7 +54,7 @@ Method (IRQM, 1, Serialized) { Switch (ToInteger (Arg0)) { - Case (Package () { 1, 5, 9, 13 }) { + Case (Package () { 1, 5, 9, 13, 17, 21, 25 }) { If (PICM) { Return (IQAA) } Else { @@ -62,7 +62,7 @@ Method (IRQM, 1, Serialized) { } } - Case (Package () { 2, 6, 10, 14 }) { + Case (Package () { 2, 6, 10, 14, 18, 22, 26 }) { If (PICM) { Return (IQBA) } Else { @@ -70,7 +70,7 @@ Method (IRQM, 1, Serialized) { } } - Case (Package () { 3, 7, 11, 15 }) { + Case (Package () { 3, 7, 11, 15, 19, 23, 27 }) { If (PICM) { Return (IQCA) } Else { @@ -78,7 +78,7 @@ Method (IRQM, 1, Serialized) { } } - Case (Package () { 4, 8, 12, 16 }) { + Case (Package () { 4, 8, 12, 16, 20, 24, 28 }) { If (PICM) { Return (IQDA) } Else { @@ -300,6 +300,11 @@ Device (RP12) } } +#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_S) +#include "pcie_pch_s.asl" +#endif + + #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_M) || CONFIG(SOC_INTEL_ALDERLAKE_PCH_P) Device (PEG0) { diff --git a/src/soc/intel/alderlake/acpi/pcie_pch_s.asl b/src/soc/intel/alderlake/acpi/pcie_pch_s.asl new file mode 100644 index 0000000000..5437730af1 --- /dev/null +++ b/src/soc/intel/alderlake/acpi/pcie_pch_s.asl @@ -0,0 +1,288 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Device (RP13) +{ + Name (_ADR, 0x001D0004) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP14) +{ + Name (_ADR, 0x001D0005) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP15) +{ + Name (_ADR, 0x001D0006) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP16) +{ + Name (_ADR, 0x001D0007) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP17) +{ + Name (_ADR, 0x001B0000) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP18) +{ + Name (_ADR, 0x001B0001) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP19) +{ + Name (_ADR, 0x001B0002) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP20) +{ + Name (_ADR, 0x001B0003) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP21) +{ + Name (_ADR, 0x001B0004) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP22) +{ + Name (_ADR, 0x001B0005) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP23) +{ + Name (_ADR, 0x001B0006) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP24) +{ + Name (_ADR, 0x001B0007) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP25) +{ + Name (_ADR, 0x001A0000) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP26) +{ + Name (_ADR, 0x001A0001) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP27) +{ + Name (_ADR, 0x001A0002) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (RP28) +{ + Name (_ADR, 0x001A0003) + + OperationRegion (RPCS, PCI_Config, 0x4c, 4) + Field (RPCS, AnyAcc, NoLock, Preserve) + { + , 24, + RPPN, 8, /* Root Port Number */ + } + + Method (_PRT) + { + Return (IRQM (RPPN)) + } +} + +Device (PEG0) +{ + Name (_ADR, 0x00060000) +} + +Device (PEG1) +{ + Name (_ADR, 0x00010000) +} + +Device (PEG2) +{ + Name (_ADR, 0x00010001) +} diff --git a/src/soc/intel/alderlake/acpi/serialio.asl b/src/soc/intel/alderlake/acpi/serialio.asl index a325953818..93632fc224 100644 --- a/src/soc/intel/alderlake/acpi/serialio.asl +++ b/src/soc/intel/alderlake/acpi/serialio.asl @@ -91,3 +91,9 @@ Device (UAR2) Name (_ADR, 0x00190002) Name (_DDN, "Serial IO UART Controller 2") } + +Device (UAR3) +{ + Name (_ADR, 0x00110000) + Name (_DDN, "Serial IO UART Controller 3") +} diff --git a/src/soc/intel/alderlake/acpi/xhci.asl b/src/soc/intel/alderlake/acpi/xhci.asl index 9c70d3ffad..34ff612143 100644 --- a/src/soc/intel/alderlake/acpi/xhci.asl +++ b/src/soc/intel/alderlake/acpi/xhci.asl @@ -23,7 +23,40 @@ Device (XHCI) { } +#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_S) + /* Root Hub for Alder Lake-P PCH */ + Device (RHUB) + { + Name (_ADR, Zero) + /* USB2 */ + Device (HS01) { Name (_ADR, 1) } + Device (HS02) { Name (_ADR, 2) } + Device (HS03) { Name (_ADR, 3) } + Device (HS04) { Name (_ADR, 4) } + Device (HS05) { Name (_ADR, 5) } + Device (HS06) { Name (_ADR, 6) } + Device (HS07) { Name (_ADR, 7) } + Device (HS08) { Name (_ADR, 8) } + Device (HS09) { Name (_ADR, 9) } + Device (HS10) { Name (_ADR, 10) } + Device (HS11) { Name (_ADR, 11) } + Device (HS12) { Name (_ADR, 12) } + Device (HS13) { Name (_ADR, 13) } + Device (HS14) { Name (_ADR, 14) } + /* USB3 */ + Device (SS01) { Name (_ADR, 15) } + Device (SS02) { Name (_ADR, 16) } + Device (SS03) { Name (_ADR, 17) } + Device (SS04) { Name (_ADR, 18) } + Device (SS05) { Name (_ADR, 19) } + Device (SS06) { Name (_ADR, 20) } + Device (SS07) { Name (_ADR, 21) } + Device (SS08) { Name (_ADR, 22) } + Device (SS09) { Name (_ADR, 23) } + Device (SS10) { Name (_ADR, 24) } + } +#else /* Root Hub for Alder Lake-P PCH */ Device (RHUB) { @@ -46,4 +79,5 @@ Device (XHCI) Device (SS03) { Name (_ADR, 13) } Device (SS04) { Name (_ADR, 14) } } +#endif } |