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-rw-r--r--src/southbridge/intel/bd82x6x/azalia.c2
-rw-r--r--src/southbridge/intel/bd82x6x/me_common.c2
-rw-r--r--src/southbridge/intel/bd82x6x/smbus.c2
-rw-r--r--src/southbridge/intel/bd82x6x/usb_ehci.c2
-rw-r--r--src/southbridge/intel/i82801gx/azalia.c2
-rw-r--r--src/southbridge/intel/i82801gx/sata.c2
-rw-r--r--src/southbridge/intel/i82801ix/azalia.c2
-rw-r--r--src/southbridge/intel/i82801jx/azalia.c2
-rw-r--r--src/southbridge/intel/ibexpeak/azalia.c2
-rw-r--r--src/southbridge/intel/ibexpeak/me.c2
-rw-r--r--src/southbridge/intel/ibexpeak/smbus.c2
-rw-r--r--src/southbridge/intel/ibexpeak/thermal.c2
-rw-r--r--src/southbridge/intel/ibexpeak/usb_ehci.c2
-rw-r--r--src/southbridge/intel/lynxpoint/azalia.c2
-rw-r--r--src/southbridge/intel/lynxpoint/me.c2
-rw-r--r--src/southbridge/intel/lynxpoint/serialio.c4
-rw-r--r--src/southbridge/intel/lynxpoint/smbus.c2
17 files changed, 18 insertions, 18 deletions
diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c
index 3b07a15298..1e58dfd319 100644
--- a/src/southbridge/intel/bd82x6x/azalia.c
+++ b/src/southbridge/intel/bd82x6x/azalia.c
@@ -158,7 +158,7 @@ static void azalia_init(struct device *dev)
u32 codec_mask;
u32 reg32;
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/bd82x6x/me_common.c b/src/southbridge/intel/bd82x6x/me_common.c
index 177d581103..cf322ebcb9 100644
--- a/src/southbridge/intel/bd82x6x/me_common.c
+++ b/src/southbridge/intel/bd82x6x/me_common.c
@@ -336,7 +336,7 @@ int intel_mei_setup(struct device *dev)
struct mei_csr host;
/* Find the MMIO base for the ME interface */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res || res->base == 0 || res->size == 0) {
printk(BIOS_DEBUG, "ME: MEI resource not present!\n");
return -1;
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 839b0c3df0..0ae1f4ab28 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -19,7 +19,7 @@ static void pch_smbus_init(struct device *dev)
pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)));
/* Set Receive Slave Address */
- res = find_resource(dev, PCI_BASE_ADDRESS_4);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_4);
if (res)
smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
}
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index 8bc45f69da..2764861651 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -43,7 +43,7 @@ static void usb_ehci_init(struct device *dev)
/* Enable writes to protected registers. */
pci_write_config8(dev, 0x80, access_cntl | 1);
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
/* Number of ports and companion controllers. */
reg32 = read32((void *)(uintptr_t)(res->base + 4));
diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c
index 0473de64de..cc5d3455c7 100644
--- a/src/southbridge/intel/i82801gx/azalia.c
+++ b/src/southbridge/intel/i82801gx/azalia.c
@@ -186,7 +186,7 @@ static void azalia_init(struct device *dev)
// Docking not supported
pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c
index abb0e2e03e..d0d8b3bf33 100644
--- a/src/southbridge/intel/i82801gx/sata.c
+++ b/src/southbridge/intel/i82801gx/sata.c
@@ -130,7 +130,7 @@ static void sata_init(struct device *dev)
/* Interrupt Pin is set by D31IP.PIP */
pci_write_config8(dev, INTR_LN, 0x0a);
- struct resource *ahci_res = find_resource(dev, PCI_BASE_ADDRESS_5);
+ struct resource *ahci_res = probe_resource(dev, PCI_BASE_ADDRESS_5);
if (ahci_res != NULL)
/* write AHCI GHC_PI register */
write32(res2mmio(ahci_res, 0xc, 0), config->sata_ports_implemented);
diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c
index 90d784cd65..2646cbc72b 100644
--- a/src/southbridge/intel/i82801ix/azalia.c
+++ b/src/southbridge/intel/i82801ix/azalia.c
@@ -179,7 +179,7 @@ static void azalia_init(struct device *dev)
/* Lock some R/WO bits by writing their current value. */
pci_update_config32(dev, 0x74, ~0, 0);
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c
index 885c332f8f..500c004ff1 100644
--- a/src/southbridge/intel/i82801jx/azalia.c
+++ b/src/southbridge/intel/i82801jx/azalia.c
@@ -179,7 +179,7 @@ static void azalia_init(struct device *dev)
/* Lock some R/WO bits by writing their current value. */
pci_update_config32(dev, 0x74, ~0, 0);
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c
index 683715fd6b..5eb1ac3633 100644
--- a/src/southbridge/intel/ibexpeak/azalia.c
+++ b/src/southbridge/intel/ibexpeak/azalia.c
@@ -158,7 +158,7 @@ static void azalia_init(struct device *dev)
u32 reg32;
/* Find base address */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c
index 20b8aac94a..74b386169a 100644
--- a/src/southbridge/intel/ibexpeak/me.c
+++ b/src/southbridge/intel/ibexpeak/me.c
@@ -395,7 +395,7 @@ static int intel_mei_setup(struct device *dev)
u16 reg16;
/* Find the MMIO base for the ME interface */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res || res->base == 0 || res->size == 0) {
printk(BIOS_DEBUG, "ME: MEI resource not present!\n");
return -1;
diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c
index 12734a0ce6..66523256b9 100644
--- a/src/southbridge/intel/ibexpeak/smbus.c
+++ b/src/southbridge/intel/ibexpeak/smbus.c
@@ -19,7 +19,7 @@ static void pch_smbus_init(struct device *dev)
pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)));
/* Set Receive Slave Address */
- res = find_resource(dev, PCI_BASE_ADDRESS_4);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_4);
if (res)
smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
}
diff --git a/src/southbridge/intel/ibexpeak/thermal.c b/src/southbridge/intel/ibexpeak/thermal.c
index 142d3c7d6d..b96833cb54 100644
--- a/src/southbridge/intel/ibexpeak/thermal.c
+++ b/src/southbridge/intel/ibexpeak/thermal.c
@@ -14,7 +14,7 @@ static void thermal_init(struct device *dev)
u8 *base;
printk(BIOS_DEBUG, "Thermal init start.\n");
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/ibexpeak/usb_ehci.c b/src/southbridge/intel/ibexpeak/usb_ehci.c
index a2adc5aab7..3de8c33652 100644
--- a/src/southbridge/intel/ibexpeak/usb_ehci.c
+++ b/src/southbridge/intel/ibexpeak/usb_ehci.c
@@ -36,7 +36,7 @@ static void usb_ehci_init(struct device *dev)
/* Enable writes to protected registers. */
pci_write_config8(dev, 0x80, access_cntl | 1);
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (res) {
/* Number of ports and companion controllers. */
reg32 = read32((u32 *)(uintptr_t)(res->base + 4));
diff --git a/src/southbridge/intel/lynxpoint/azalia.c b/src/southbridge/intel/lynxpoint/azalia.c
index 27ee9248a2..fe5c4c9fdd 100644
--- a/src/southbridge/intel/lynxpoint/azalia.c
+++ b/src/southbridge/intel/lynxpoint/azalia.c
@@ -101,7 +101,7 @@ static void azalia_init(struct device *dev)
u32 codec_mask;
/* Find base address */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
diff --git a/src/southbridge/intel/lynxpoint/me.c b/src/southbridge/intel/lynxpoint/me.c
index 886fd90e9e..c2f1db2122 100644
--- a/src/southbridge/intel/lynxpoint/me.c
+++ b/src/southbridge/intel/lynxpoint/me.c
@@ -670,7 +670,7 @@ static int intel_mei_setup(struct device *dev)
struct mei_csr host;
/* Find the MMIO base for the ME interface */
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res || res->base == 0 || res->size == 0) {
printk(BIOS_DEBUG, "ME: MEI resource not present!\n");
return -1;
diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c
index 34f8c78c6d..0aa683d633 100644
--- a/src/southbridge/intel/lynxpoint/serialio.c
+++ b/src/southbridge/intel/lynxpoint/serialio.c
@@ -166,10 +166,10 @@ static void serialio_init(struct device *dev)
pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
/* Find BAR0 and BAR1 */
- bar0 = find_resource(dev, PCI_BASE_ADDRESS_0);
+ bar0 = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!bar0)
return;
- bar1 = find_resource(dev, PCI_BASE_ADDRESS_1);
+ bar1 = probe_resource(dev, PCI_BASE_ADDRESS_1);
if (!bar1)
return;
diff --git a/src/southbridge/intel/lynxpoint/smbus.c b/src/southbridge/intel/lynxpoint/smbus.c
index d55aa6e3d0..f41e322b82 100644
--- a/src/southbridge/intel/lynxpoint/smbus.c
+++ b/src/southbridge/intel/lynxpoint/smbus.c
@@ -18,7 +18,7 @@ static void pch_smbus_init(struct device *dev)
pci_and_config16(dev, 0x80, ~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)));
/* Set Receive Slave Address */
- res = find_resource(dev, PCI_BASE_ADDRESS_4);
+ res = probe_resource(dev, PCI_BASE_ADDRESS_4);
if (res)
smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 23:16:31 +0000