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-rw-r--r--src/soc/mediatek/mt8188/usb.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8188/usb.c b/src/soc/mediatek/mt8188/usb.c
index 2312e2d42a..75d4667e7a 100644
--- a/src/soc/mediatek/mt8188/usb.c
+++ b/src/soc/mediatek/mt8188/usb.c
@@ -11,7 +11,22 @@
#include <soc/pll_common.h>
#include <soc/usb.h>
+#define TRAP_USB20_P1_USBD1_EN 0x10005600
+
+static void mt_set_trapping_pin(void)
+{
+ /*
+ * MT8188 supports port0/port1 download. The hardware needs a trapping pin to
+ * select the port to use. When port1 is selected, the phy of port1 will be
+ * switched to port0. That is, port1 connector will be the physical line of
+ * port0. Since port0 phy isn't initialized in coreboot, switch back to port1
+ * phy.
+ */
+ setbits32p(TRAP_USB20_P1_USBD1_EN, BIT(9));
+}
+
void mtk_usb_prepare(void)
{
mt_pll_set_usb_clock();
+ mt_set_trapping_pin();
}