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-rw-r--r--src/soc/intel/elkhartlake/fsp_params.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c
index 1584c6af6c..2100cc4ded 100644
--- a/src/soc/intel/elkhartlake/fsp_params.c
+++ b/src/soc/intel/elkhartlake/fsp_params.c
@@ -264,6 +264,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->DdiPortCHpd = config->DdiPortCHpd;
params->DdiPortCDdc = config->DdiPortCDdc;
+ /* Intel Speed Step */
+ params->Eist = config->eist_enable;
+
/* Use coreboot MP PPI services if Kconfig is enabled */
if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI))
params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data();