diff options
| -rw-r--r-- | src/soc/intel/quark/Kconfig | 32 | ||||
| -rw-r--r-- | src/soc/intel/quark/Makefile.inc | 6 | ||||
| -rw-r--r-- | src/soc/intel/quark/romstage/romstage.c | 11 |
3 files changed, 0 insertions, 49 deletions
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 37b669d828..6669d81113 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -204,38 +204,6 @@ config RELOCATE_FSP_INTO_DRAM Relocate the FSP binary into DRAM before the call to SiliconInit. ##### -# FSP PDAT binary -# The following options control the FSP platform data binary -# file placement in the flash image. -##### - -config ADD_FSP_PDAT_FILE - bool "Should the PDAT binary be added to the flash image?" - default n - depends on PLATFORM_USES_FSP1_1 - help - The PDAT file is required for the FSP 1.1 binary - -config FSP_PDAT_FILE - string - default "3rdparty/blobs/soc/intel/quark/pdat.bin" - depends on PLATFORM_USES_FSP1_1 - depends on ADD_FSP_PDAT_FILE - help - The path and filename of the Intel Galileo platform-data-patch (PDAT) - binary. This binary file is generated by the platform-data-patch.py - script released with the Quark BSP and contains the Ethernet address. - -config FSP_PDAT_LOC - hex - default 0xfff10000 - depends on PLATFORM_USES_FSP1_1 - depends on ADD_FSP_PDAT_FILE - help - The location in CBFS that the PDAT is located. It must match the - PCD PcdPlatformDataBaseAddress of Quark SoC FSP. - -##### # RMU binary # The following options control the Quark chipset microcode file # placement in the flash image. This file is required to bring diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index edbb8be5b7..f5b9746159 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -56,12 +56,6 @@ fsp.bin-file := $(call strip_quotes,$(CONFIG_FSP_FILE)) fsp.bin-position := $(CONFIG_FSP_LOC) fsp.bin-type := raw -# Add the platform data file to the CBFS image -cbfs-files-$(CONFIG_ADD_FSP_PDAT_FILE) += pdat.bin -pdat.bin-file := $(call strip_quotes,$(CONFIG_FSP_PDAT_FILE)) -pdat.bin-position := $(CONFIG_FSP_PDAT_LOC) -pdat.bin-type := raw - # Add the chipset microcode file to the CBFS image cbfs-files-$(CONFIG_ADD_RMU_FILE) += rmu.bin rmu.bin-file := $(call strip_quotes,$(CONFIG_RMU_FILE)) diff --git a/src/soc/intel/quark/romstage/romstage.c b/src/soc/intel/quark/romstage/romstage.c index c14acb768e..b99ad5425d 100644 --- a/src/soc/intel/quark/romstage/romstage.c +++ b/src/soc/intel/quark/romstage/romstage.c @@ -127,20 +127,9 @@ void soc_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *upd) { const struct device *dev; - char *pdat_file; - size_t pdat_file_len; const struct soc_intel_quark_config *config; struct chipset_power_state *ps = car_get_var_ptr(&power_state); - /* Locate the pdat.bin file */ - pdat_file = cbfs_boot_map_with_leak("pdat.bin", CBFS_TYPE_RAW, - &pdat_file_len); - if (!pdat_file) { - printk(BIOS_DEBUG, - "Platform configuration file (pdat.bin) not found."); - pdat_file_len = 0; - } - /* Locate the configuration data from devicetree.cb */ dev = dev_find_slot(0, LPC_DEV_FUNC); if (!dev) { |