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-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 9f940c0620..3d0df6874e 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -351,15 +351,10 @@
#define SPI_FIFO 0x80
#define SPI_FIFO_DEPTH (0xc7 - SPI_FIFO)
-#define SPI100_SPEED_CONFIG 0x22
-/* Use SPI_SPEED_16M-SPI_SPEED_66M below for the southbridge */
-#define SPI_CNTRL1_SPEED_MASK (BIT(15) | BIT(14) | BIT(13) | BIT(12))
-#define SPI_NORM_SPEED_SH 12
-#define SPI_FAST_SPEED_SH 8
-
#define SPI100_ENABLE 0x20
#define SPI_USE_SPI100 BIT(0)
+/* Use SPI_SPEED_16M-SPI_SPEED_66M below for the southbridge */
#define SPI100_SPEED_CONFIG 0x22
#define SPI_SPEED_66M (0x0)
#define SPI_SPEED_33M ( BIT(0))