diff options
| -rw-r--r-- | src/drivers/intel/fsp2_0/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/memory_init.c | 5 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/save_mrc_data.c | 13 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/silicon_init.c | 4 | ||||
| -rw-r--r-- | src/include/mrc_cache.h | 6 |
5 files changed, 17 insertions, 14 deletions
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index 756ba1ec5a..16742fd1a4 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -16,6 +16,7 @@ romstage-y += memory_init.c romstage-$(CONFIG_MMA) += mma_core.c romstage-y += cbmem.c romstage-$(CONFIG_ENABLE_FSP_ERROR_INFO) += fsp_error_info_hob.c +romstage-$(CONFIG_CACHE_MRC_SETTINGS) += save_mrc_data.c ramstage-y += debug.c ramstage-$(CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER) += fsp_debug_event.c @@ -30,7 +31,7 @@ ramstage-y += notify.c ramstage-y += silicon_init.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c ramstage-y += util.c -ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += save_mrc_data.c +ramstage-$(CONFIG_FSP_NVS_DATA_POST_SILICON_INIT) += save_mrc_data.c ramstage-$(CONFIG_MMA) += mma_core.c ramstage-$(CONFIG_ENABLE_FSP_ERROR_INFO) += fsp_error_info_hob.c ramstage-$(CONFIG_BMP_LOGO) += fsp_gop_blt.c diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index d6677b4732..4706dce813 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -74,8 +74,11 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t version) (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) die("Failed to accommodate FSP reserved memory request!\n"); - if (CONFIG(CACHE_MRC_SETTINGS) && !s3wake) + if (CONFIG(CACHE_MRC_SETTINGS) && !s3wake) { do_cbmem_version_entry(cbmem_id, version); + if (!CONFIG(FSP_NVS_DATA_POST_SILICON_INIT)) + save_memory_training_data(); + } /* Create romstage handof information */ romstage_handoff_init(s3wake); diff --git a/src/drivers/intel/fsp2_0/save_mrc_data.c b/src/drivers/intel/fsp2_0/save_mrc_data.c index 1d682b99c2..50be10b90c 100644 --- a/src/drivers/intel/fsp2_0/save_mrc_data.c +++ b/src/drivers/intel/fsp2_0/save_mrc_data.c @@ -1,13 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <acpi/acpi.h> -#include <bootstate.h> #include <cbmem.h> #include <console/console.h> #include <fsp/util.h> #include <mrc_cache.h> -static void save_mrc_data(void *unused) +void save_memory_training_data(void) { size_t mrc_data_size; const void *mrc_data; @@ -41,13 +40,3 @@ static void save_mrc_data(void *unused) mrc_data_size) < 0) printk(BIOS_ERR, "Failed to stash MRC data\n"); } - -/* - * Should be done before ramstage_cse_fw_sync() to avoid traning memory twice on - * a cold boot after a full firmware update. - */ -#if CONFIG(FSP_NVS_DATA_POST_SILICON_INIT) -BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_EXIT, save_mrc_data, NULL); -#else -BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, save_mrc_data, NULL); -#endif diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 72a30c51e3..094eed4160 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -9,6 +9,7 @@ #include <console/console.h> #include <fsp/api.h> #include <fsp/util.h> +#include <mrc_cache.h> #include <program_loading.h> #include <soc/intel/common/reset.h> #include <soc/intel/common/vbt.h> @@ -253,6 +254,9 @@ void fsp_silicon_init(void) fsps_load(); do_silicon_init(&fsps_hdr); + if (CONFIG(CACHE_MRC_SETTINGS) && CONFIG(FSP_NVS_DATA_POST_SILICON_INIT)) + save_memory_training_data(); + if (CONFIG(DISPLAY_FSP_TIMESTAMPS)) fsp_display_timestamp(); } diff --git a/src/include/mrc_cache.h b/src/include/mrc_cache.h index f1e6b52010..1fb172fc40 100644 --- a/src/include/mrc_cache.h +++ b/src/include/mrc_cache.h @@ -47,4 +47,10 @@ void *mrc_cache_current_mmap_leak(int type, uint32_t version, int mrc_cache_stash_data(int type, uint32_t version, const void *data, size_t size); +/** + * API to locate the FSP Non-Volatile Storage Data (aka memory training data) + * and store into the NVS. + */ +void save_memory_training_data(void); + #endif /* _COMMON_MRC_CACHE_H_ */ |