diff options
-rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/memmap.h | 6 | ||||
-rw-r--r-- | src/drivers/intel/fsp1_1/stack.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/memmap.c | 6 | ||||
-rw-r--r-- | src/soc/intel/skylake/memmap.c | 4 |
4 files changed, 9 insertions, 9 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/memmap.h b/src/drivers/intel/fsp1_1/include/fsp/memmap.h index 2ac3260908..965bce646e 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/memmap.h +++ b/src/drivers/intel/fsp1_1/include/fsp/memmap.h @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015 Intel Corporation. + * Copyright (C) 2015-2016 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -19,11 +19,11 @@ #include <types.h> /* - * mmap_region_granluarity must to return a size which is a positive non-zero + * mmap_region_granularity must to return a size which is a positive non-zero * integer multiple of the SMM size when SMM is in use. When not using SMM, * this value should be set to 8 MiB. */ -size_t mmap_region_granluarity(void); +size_t mmap_region_granularity(void); /* Fills in the arguments for the entire SMM region covered by chipset * protections. e.g. TSEG. */ diff --git a/src/drivers/intel/fsp1_1/stack.c b/src/drivers/intel/fsp1_1/stack.c index 18a2454de6..e048229baa 100644 --- a/src/drivers/intel/fsp1_1/stack.c +++ b/src/drivers/intel/fsp1_1/stack.c @@ -67,7 +67,7 @@ void *setup_stack_and_mtrrs(void) * of physical address bits. */ mtrr_mask_upper = (1 << ((cpuid_eax(0x80000008) & 0xff) - 32)) - 1; - alignment = mmap_region_granluarity(); + alignment = mmap_region_granularity(); aligned_ram = ALIGN_DOWN(top_of_stack - romstage_ram_stack_size, alignment); diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c index 9f5d328b95..19189f948e 100644 --- a/src/soc/intel/braswell/memmap.c +++ b/src/soc/intel/braswell/memmap.c @@ -2,14 +2,14 @@ * This file is part of the coreboot project. * * Copyright (C) 2013 Google, Inc. - * Copyright (C) 2015 Intel Corp. + * Copyright (C) 2015-2016 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied wacbmem_entryanty of + * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ @@ -36,7 +36,7 @@ void smm_region(void **start, size_t *size) *size = smm_region_size(); } -size_t mmap_region_granluarity(void) +size_t mmap_region_granularity(void) { /* Align to TSEG size when SMM is in use, and 8MiB by default */ return IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) ? smm_region_size() diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c index a0211c74db..31739bcc55 100644 --- a/src/soc/intel/skylake/memmap.c +++ b/src/soc/intel/skylake/memmap.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015 Intel Corporation. + * Copyright (C) 2015-2016 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -27,7 +27,7 @@ #include <soc/systemagent.h> #include <stdlib.h> -size_t mmap_region_granluarity(void) +size_t mmap_region_granularity(void) { if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) /* Align to TSEG size when SMM is in use */ |