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-rw-r--r--src/mainboard/google/slippy/devicetree.cb3
-rw-r--r--src/southbridge/intel/lynxpoint/lp_gpio.h2
2 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/google/slippy/devicetree.cb b/src/mainboard/google/slippy/devicetree.cb
index 79fea8b89b..b9bc47fb17 100644
--- a/src/mainboard/google/slippy/devicetree.cb
+++ b/src/mainboard/google/slippy/devicetree.cb
@@ -57,7 +57,8 @@ chip northbridge/intel/haswell
register "gen1_dec" = "0x00fc0801"
register "gen2_dec" = "0x00fc0901"
- register "alt_gp_smi_en" = "0x0000"
+ # EC_SMI is GPIO34
+ register "alt_gp_smi_en" = "0x0004"
register "gpe0_en_1" = "0x00000000"
# EC_SCI is GPIO36
register "gpe0_en_2" = "0x00000010"
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.h b/src/southbridge/intel/lynxpoint/lp_gpio.h
index 48a23cb084..d9927dc975 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.h
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.h
@@ -110,7 +110,7 @@
.route = GPIO_ROUTE_SCI }
#define LP_GPIO_ACPI_SMI \
- { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT, \
+ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT, \
.owner = GPIO_OWNER_ACPI, \
.route = GPIO_ROUTE_SMI }