diff options
| -rw-r--r-- | src/soc/intel/baytrail/cpu.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/denverton_ns/cpu.c | 4 |
2 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c index 1dbc3d7751..eb24f7bf8c 100644 --- a/src/soc/intel/baytrail/cpu.c +++ b/src/soc/intel/baytrail/cpu.c @@ -36,6 +36,9 @@ static void soc_core_init(struct device *cpu) { printk(BIOS_DEBUG, "Init BayTrail core.\n"); + /* Enable the local CPU apics */ + setup_lapic(); + /* * The turbo disable bit is actually scoped at building block level -- not package. * For non-BSP cores that are within a building block, enable turbo. The cores within diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 126a1c651f..ef1140b76a 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <cpu/cpu.h> #include <cpu/x86/cr.h> +#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> @@ -91,6 +92,9 @@ static void denverton_core_init(struct device *cpu) /* Enable Turbo */ enable_turbo(); + /* Enable the local CPU apics */ + setup_lapic(); + /* Enable speed step. Always ON.*/ msr = rdmsr(IA32_MISC_ENABLE); msr.lo |= SPEED_STEP_ENABLE_BIT; |