summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmMemRestore.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmMemRestore.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmMemRestore.c
index 97320d9930..ee14fed847 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmMemRestore.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/Main/mmMemRestore.c
@@ -347,7 +347,9 @@ MemMRestoreDqsTimings (
if (!MemMSetCSRNb (&NBArray[Node], Reg->SpecialCases, PciAddress, *((UINT32 *) OrMask) & Reg->RegisterList[j].AndMask)) {
return FALSE; // Restore fails
}
- OrMask += (Reg->RegisterList[j].Type.RegisterSize == 0) ? 4 : Reg->RegisterList[j].Type.RegisterSize;
+ if (Reg->RegisterList[j].Type.RegisterSize != 3)
+ OrMask += (Reg->RegisterList[j].Type.RegisterSize == 0) ? 4 :
+ Reg->RegisterList[j].Type.RegisterSize;
}
if (MaxNode < Node) {
@@ -370,7 +372,9 @@ MemMRestoreDqsTimings (
if (!MemMSetCSRNb (&NBArray[Node], CReg->SpecialCases, PciAddress, *((UINT32 *) OrMask) & CReg->RegisterList[j].AndMask)) {
return FALSE; // Restore fails
}
- OrMask += (CReg->RegisterList[j].Type.RegisterSize == 0) ? 4 : CReg->RegisterList[j].Type.RegisterSize;
+ if (CReg->RegisterList[j].Type.RegisterSize != 3)
+ OrMask += (CReg->RegisterList[j].Type.RegisterSize == 0) ? 4 :
+ CReg->RegisterList[j].Type.RegisterSize;
}
}
} else if (((State == ST_PRE_ESR) && (Device.CommonDeviceHeader->Type == DEV_TYPE_MSR_PRE_ESR)) ||
@@ -606,4 +610,4 @@ MemMCreateS3NbBlock (
}
}
}
-} \ No newline at end of file
+}