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-rw-r--r--src/mainboard/asus/m2v-mx_se/Config.lb18
-rw-r--r--src/mainboard/asus/m2v-mx_se/Options.lb3
-rw-r--r--src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c54
-rw-r--r--targets/asus/m2v-mx_se/Config.lb38
4 files changed, 28 insertions, 85 deletions
diff --git a/src/mainboard/asus/m2v-mx_se/Config.lb b/src/mainboard/asus/m2v-mx_se/Config.lb
index 9c729131f2..461be2b59f 100644
--- a/src/mainboard/asus/m2v-mx_se/Config.lb
+++ b/src/mainboard/asus/m2v-mx_se/Config.lb
@@ -20,23 +20,7 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-if USE_FALLBACK_IMAGE
- default ROM_SECTION_SIZE = FALLBACK_SIZE
- default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
-else
- default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
- default ROM_SECTION_OFFSET = 0
-end
-
-default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
-default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-default CONFIG_ROM_PAYLOAD = 1
-default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
-
-##WARNING enable caching of whole ROM during CAR
-##for 512KB flash
-default XIP_ROM_SIZE = 0x80000
-default XIP_ROM_BASE = 0xffffffff + 1 - XIP_ROM_SIZE
+include /config/nofailovercalculation128.lb
arch i386 end
diff --git a/src/mainboard/asus/m2v-mx_se/Options.lb b/src/mainboard/asus/m2v-mx_se/Options.lb
index 5d74fbce22..8f388d5219 100644
--- a/src/mainboard/asus/m2v-mx_se/Options.lb
+++ b/src/mainboard/asus/m2v-mx_se/Options.lb
@@ -96,8 +96,6 @@ uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
uses CONFIG_COMPRESSED_PAYLOAD_LZMA
uses CONFIG_USE_PRINTK_IN_CAR
-default ROM_SIZE = 512 * 1024
-default FALLBACK_SIZE = 256 * 1024
default HAVE_FALLBACK_BOOT = 1
default HAVE_HARD_RESET = 1
default HAVE_PIRQ_TABLE = 0
@@ -153,7 +151,6 @@ default MAINBOARD_VENDOR = "ASUS"
default MAINBOARD_PART_NUMBER = "M2V-MX SE"
default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID = 0x1043
# default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID = 0x1234 # FIXME
-default ROM_IMAGE_SIZE = 64 * 1024
default STACK_SIZE = 8 * 1024
default HEAP_SIZE = 256 * 1024
# More 1M for pgtbl.
diff --git a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
index ba3baacfd3..15dcda5ec1 100644
--- a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
+++ b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
@@ -162,64 +162,10 @@ void sio_init(void)
}
-#if USE_FALLBACK_IMAGE == 1
-
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
- /* unsigned last_boot_normal_x = last_boot_normal(); */
- /* FIXME */
- unsigned last_boot_normal_x = 1;
-
- sio_init();
- it8712f_enable_serial(SERIAL_DEV, TTYS0_BASE);
- it8712f_kill_watchdog();
- uart_init();
- console_init();
- enable_rom_decode();
-
- print_info("now booting... fallback\r\n");
-
- /* Is this a CPU only reset? Or is this a secondary CPU? */
- if ((cpu_init_detectedx) || (!boot_cpu())) {
- if (last_boot_normal_x)
- goto normal_image;
- else
- goto fallback_image;
- }
-
- /* Nothing special needs to be done to find bus 0. */
- /* Allow the HT devices to be found. */
- enumerate_ht_chain();
-
- /* Is this a deliberate reset by the BIOS? */
- if (bios_reset_detected() && last_boot_normal_x) {
- goto normal_image;
- }
- /* This is the primary CPU, how should I boot? */
- else if (do_normal_boot()) {
- goto normal_image;
- } else {
- goto fallback_image;
- }
-
-normal_image:
- /* print_info("JMP normal image\r\n"); */
-
- __asm__ __volatile__("jmp __normal_image":
- :"a" (bist), "b" (cpu_init_detectedx));
-
-fallback_image:
- ;
-}
-#endif
-
void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
-#if USE_FALLBACK_IMAGE == 1
- failover_process(bist, cpu_init_detectedx);
-#endif
real_main(bist, cpu_init_detectedx);
}
diff --git a/targets/asus/m2v-mx_se/Config.lb b/targets/asus/m2v-mx_se/Config.lb
index 200fc348f7..f963f651da 100644
--- a/targets/asus/m2v-mx_se/Config.lb
+++ b/targets/asus/m2v-mx_se/Config.lb
@@ -20,19 +20,35 @@
target asus_m2v-mx_se
mainboard asus/m2v-mx_se
-romimage "normal"
- option ROM_SIZE = 512 * 1024
- option USE_FALLBACK_IMAGE = 0
- option ROM_IMAGE_SIZE = 128 * 1024
- option COREBOOT_EXTRA_VERSION=".0Normal"
- payload ../payload.elf
-end
+## ROM_SIZE is the total number of bytes allocated for coreboot use
+## (normal AND fallback images and payloads).
+
+# The board comes with 512KB SPI flash (DIP8), 128KB is for coreboot binary
+# 384KB of flash is for payload/roms.
+
+option ROM_SIZE = 512 * 1024
+
+# Use following line instead if you want to use onboard VGA -
+# padd the rom size to 64KB or XIP won't work, complaining about
+# not good base.
+
+#option ROM_SIZE = (512 * 1024) - (64 * 1024)
+
+## ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
+## not including any payload.
+
+# Please note that 128KB is cached for (XIP) too
+
+option ROM_IMAGE_SIZE = 128 * 1024
+
+## FALLBACK_SIZE is the amount of the ROM the complete fallback image
+## (including payload) will use.
+
+option FALLBACK_SIZE = ROM_SIZE
romimage "fallback"
- option USE_FALLBACK_IMAGE = 1
- option ROM_IMAGE_SIZE = 128 * 1024
- option COREBOOT_EXTRA_VERSION=".0Fallback"
+ option USE_FALLBACK_IMAGE=1
payload ../payload.elf
end
-buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"
+buildrom ./coreboot.rom ROM_SIZE "fallback"