diff options
| -rw-r--r-- | src/southbridge/intel/i82801gx/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/nvs.h | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801ix/nvs.h | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/nvs.h | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl index 9df2252d53..33472b65ed 100644 --- a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl @@ -57,7 +57,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) TCRT, 8, // 0x19 - critical trip point DTSE, 8, // 0x1a - Digital Thermal Sensor enable DTS1, 8, // 0x1b - DT sensor 1 - DTS2, 8, // 0x1c - DT sensor 2 + FLVL, 8, // 0x1c - current fan level /* Battery Support */ Offset (0x1e), BNUM, 8, // 0x1e - number of batteries diff --git a/src/southbridge/intel/i82801gx/nvs.h b/src/southbridge/intel/i82801gx/nvs.h index decea53438..483eddb420 100644 --- a/src/southbridge/intel/i82801gx/nvs.h +++ b/src/southbridge/intel/i82801gx/nvs.h @@ -42,7 +42,7 @@ typedef struct { u8 tcrt; /* 0x19 - critical trip point */ u8 dtse; /* 0x1a - Digital Thermal Sensor enable */ u8 dts1; /* 0x1b - DT sensor 1 */ - u8 dts2; /* 0x1c - DT sensor 2 */ + u8 flvl; /* 0x1c - current fan level */ u8 rsvd2; /* Battery Support */ u8 bnum; /* 0x1e - number of batteries */ diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl index 97d9fa9f82..c1be85246d 100644 --- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl @@ -58,7 +58,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) TCRT, 8, // 0x19 - critical trip point DTSE, 8, // 0x1a - Digital Thermal Sensor enable DTS1, 8, // 0x1b - DT sensor 1 - DTS2, 8, // 0x1c - DT sensor 2 + FLVL, 8, // 0x1c - current fan level /* Battery Support */ Offset (0x1e), BNUM, 8, // 0x1e - number of batteries diff --git a/src/southbridge/intel/i82801ix/nvs.h b/src/southbridge/intel/i82801ix/nvs.h index decea53438..483eddb420 100644 --- a/src/southbridge/intel/i82801ix/nvs.h +++ b/src/southbridge/intel/i82801ix/nvs.h @@ -42,7 +42,7 @@ typedef struct { u8 tcrt; /* 0x19 - critical trip point */ u8 dtse; /* 0x1a - Digital Thermal Sensor enable */ u8 dts1; /* 0x1b - DT sensor 1 */ - u8 dts2; /* 0x1c - DT sensor 2 */ + u8 flvl; /* 0x1c - current fan level */ u8 rsvd2; /* Battery Support */ u8 bnum; /* 0x1e - number of batteries */ diff --git a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl index df8306441a..44aa8e4511 100644 --- a/src/southbridge/intel/i82801jx/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801jx/acpi/globalnvs.asl @@ -58,7 +58,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) CRTT, 8, // 0x19 - critical trip point DTSE, 8, // 0x1a - Digital Thermal Sensor enable DTS1, 8, // 0x1b - DT sensor 1 - DTS2, 8, // 0x1c - DT sensor 2 + FLVL, 8, // 0x1c - current fan level /* Battery Support */ Offset (0x1e), BNUM, 8, // 0x1e - number of batteries diff --git a/src/southbridge/intel/i82801jx/nvs.h b/src/southbridge/intel/i82801jx/nvs.h index c3a3920596..16c49bb18b 100644 --- a/src/southbridge/intel/i82801jx/nvs.h +++ b/src/southbridge/intel/i82801jx/nvs.h @@ -42,7 +42,7 @@ typedef struct { u8 crtt; /* 0x19 - critical trip point */ u8 dtse; /* 0x1a - Digital Thermal Sensor enable */ u8 dts1; /* 0x1b - DT sensor 1 */ - u8 dts2; /* 0x1c - DT sensor 2 */ + u8 flvl; /* 0x1c - current fan level */ u8 rsvd2; /* Battery Support */ u8 bnum; /* 0x1e - number of batteries */ |